IS89C54-40PL INTEGRATED CIRCUIT SOLUTION, IS89C54-40PL Datasheet
IS89C54-40PL
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IS89C54-40PL Summary of contents
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... IS89C54/58/64 are just changed internal Flash size, other features are same as standard IS89C52. The IS89C54/58/64 contains a 16K/32K/64K x 8 Flash; a 256 x 8 RAM; 32 I/O lines for either multi-processor communications; I/O expansion or full duplex UART; three 16-bit timers/counters ...
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... IS89C54/58/64 INDEX P1.5 7 P1.6 8 P1.7 9 RST 10 RxD/P3 TxD/P3.1 13 INT0/P3.2 14 INT1/P3.3 15 T0/P3.4 16 T1/P3.5 17 Figure 2. IS89C54/58/64 Pin Configuration: 44-pin PLCC TOP VIEW P0.4/AD4 38 P0.5/AD5 37 P0.6/AD6 36 P0.7/AD7 35 EA/VPP ALE/PROG 32 PSEN 31 P2.7/A15 30 P2.6/A14 29 P2.5/A13 Integrated Circuit Solution Inc. ...
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... IS89C54/58/64 P1.5 1 P1.6 2 P1.7 3 RST 4 RxD/P3 TxD/P3.1 7 INT0/P3.2 8 INT1/P3.3 9 T0/P3.4 10 T1/P3.5 11 Figure 3. IS89C54/58/64 Pin Configuration: 44-pin PQFP Integrated Circuit Solution Inc. MC009- P0.4/AD4 P0.5/AD5 32 31 P0.6/AD6 30 P0.7/AD7 29 EA/Vpp 29 NC ALE/PROG 27 26 PSEN P2.7/A15 ...
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... IS89C54/58/64 16K/32K/64K MAIN CODE FLASH VCC VSS P2[7:0] P0[7:0] PORT 1 P1[7:0] 4 SFR BLOCK 80C31 CPU CORE TIMER 2 UART INT0 TIMER 0 Figure 4. IS89C54/58/64 Block Diagram 256 BYTE RAM ALE PSEN RST CLOCK EA & TIMING XTAL2 XTAL1 INT1 PORT 3 TIMER 1 P3[7:0] Integrated Circuit Solution Inc. MC009-0B ...
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... FFFFH. If EA# is held high, the device executes from internal program memory unless the program counter contains an address grater than 3FFFH/7FFFH respecting to IS89C54/58 and the device always executes internal program memory in IS89C64. This is also receives the 12 V programming enable voltage (Vpp) during Flash programming, when 12 V programming is selected ...
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... IS89C54/58/64 Table 1. Detailed Pin Description (continued) Symbol PDIP PLCC P3.0-P3.7 10-17 11, 13- PSEN 29 32 RST 9 10 XTAL XTAL GND 20 22 Vcc PQFP I/O Name and Function Port 3: Port 8-bit bi-directional I/O port with internal pull- ...
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... Other informations refer to IS80C52/32 data sheet except flash memory. FLASH MEMORY PROGRAMMING The Flash architecture of IS89C54/58/64 is shown in Figure 5. IS89C54/58 include block 1 and lock bits block. The signature bytes are fixed value reside in MCU, they are read only. Block 2 resides in IS89C64 only. 0030H ...
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... IS89C54/58/64 The IS89C54/58/64 provide the user with a direct flash memory access that can be used for programming into the flash memory without using the CPU. The direct flash memory access is entered using the External Host Mode. While the reset input (RST) is continually held active (high), ...
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... Block 1 includes flash address from 0000H to 3FFFH in IS89C54, from 0000H to 7FFFH in IS89C58, from 0000H to EFFFH in IS89C64. Block 2 includes F000H to FFFFH. Block 2 is resident in IS89C64 only. ...
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... IS89C54/58/64 Arming Command An arming command must take place before a Written Mode will be recognized by the IS89C54/58/64. This is to prevent accidental triggering of written operation due to noise or programmer error. The arming command is as follows: A Read Signature Bytes command is issued. This is actually a natural step for the programmer, but will also serve as the arming command ...
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... VDD and RST, and perform the following steps. Lock bits Features The IS89C54/58/64 provide three lock bits to protect the embedded program against software piracy. These three bytes are user programmable. The relation between lock bits status and protection type are listed in table 5. ...
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... IS89C54/58/64 Absolute Maximum Ratings Parameter Operating temperature under bias Storage temperature range Voltage on any other pin to VSS Power dissipation ( based on package heat transfer l imitations, not device power consumption) Notes : 1. Operating temperature is for commercial product defined by this spec. 2. Minimum D.C. input voltage is -0.5 V. During transitions, inputs may undershoot, to -2.0 V for periods less than 20 ns. ...
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... IS89C54/58/64 DC CHARACTERISTICS (Ta=0°C to 70°C; VCC=5V+10%; VSS=0V ) Symbol Parameter Input low voltage (All except EA Input low voltage (EA Input high voltage IH (All except XTAL 1, RST Input high voltage (XTAL RST positive schmitt-trigger SCH threshold voltage V – RST negative schmitt-trigger ...
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... IS89C54/58/64 POWER SUPPLY CHARACTERISTICS Symbol Parameter Icc Power supply current Active mode Idle mode Power-down mode Note: 1. See Figures7,8,9, and 10 for Icc test conditiions. Vcc RST Vcc P0 NC XTAL2 CLOCK XTAL1 SIGNAL EA GND Figure 7. Active Mode 14 Test conditions (1) Vcc = 5.0V 12 MHz 16 MHz ...
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... IS89C54/58/64 Vcc — 0.5V 0.45V Figure 10. Clock Signal Waveform for I AC CHARACTERISTICS (Ta=0°C to 70°C; VCC=5V+10%; V EXTERNAL MEMORY CHARACTERISTICS Symbol Parameter 1/t Oscillator frequency CLCL t ALE pulse width LHLL t Address valid to ALE low AVLL t Address hold after ALE low LLAX t ALE low to valid instr in ...
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... IS89C54/58/64 SERIAL PORT TIMING: SHIFT REGISTER MODE Symbol Parameter t Serial port clock cycle time XLXL t Output data setup to QVXH clock rising edg1 t Output data hold after XHQX clock rising edge t Input data hold after XHDX clock rising edge t Clock rising edge to ...
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... Busy# Time while Block 2 Erase (IS89C64) tBLTHE Busy# Low to Timeout High while Chip Erase tBLTHE1 Busy# Low to Timeout High while Block 1 Erase (IS89C54) tBLTHE2 Busy# Low to Timeout High while Block 1 Erase (IS89C58) tBLTHE3 Busy# Low to Timeout High while Block 1 Erase (IS89C64) ...
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... IS89C54/58/64 TIMING WAVEFORMS ALE t AVLL PSEN PORT 0 PORT 2 Figure 11. External Program Memory Read Cycle ALE PSEN RD t AVLL PORT 0 A7-A0 FROM RI OR DPL PORT LHLL t t LLPL PLPH t PLIV t PLAZ t t LLAX PXIX A7-A0 INSTR IN t LLIV t AVIV A15-A8 t LLDV t t LLWL ...
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... IS89C54/58/64 ALE PSEN WR t AVLL PORT 0 A7-A0 FROM RI OR DPL PORT 2 0 INSTRUCTION ALE CLOCK t QVXH DATA OUT t XHDV DATA IN Figure 14. Shift Register Mode Timing Waveform Integrated Circuit Solution Inc. MC009- LLWL WLWH t QVWX t LLAX DATA OUT t AVWL A15-A8 FROM DPH Figure 13 ...
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... IS89C54/58/64 P3[7:6] P2[7:6] P3[3:2] P2[5:0] P1[7:0] P0[7-0] VPP PROG VCC Figure 15. Read Signature bytes Timing(Arming Command) 20 00H t CVQV 30H 31H t t AVQV AVQV D5H 04H/08H/10H t WSCV 32H t AVQV 05H/FFH Integrated Circuit Solution Inc. MC009-0B ...
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... IS89C54/58/64 P3[7:6] P2[7:6] P3[3:2] P2[5:0] P1[7:0] PROG t DVPL P0[7-0] P3.4(BUSY) VPP P3.5 1. 0EH is for code memory programming. In lock bits programming, 0FH, 03H, 05H, respect to lock bits 0CH is for code memory verification and 0DH is for concurrent memory verification. 09H is for Lock bits verification. 3. Address don’t care while lock bits’ programming or verification. ...
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... IS89C54/58/64 P3[7:6] P2[7:6] P3[3:2] P2[5:0] P1[7:0] PROG P0[7-0] P3.4(BUSY) VPP P3.5 1. 01H/02H/04H are for Chip Erase/Block 1 Erase/Block 2 Erase. 2. 0CH is for code memory verification and 0DH is for concurrent memory verification. 09H is for Lock bits verification. 22 01H/02H/04H ( BLCX t t CVPL BLPH t t PLBL BLBHE t BLBHEn t SHPL t t PLTL BLTHE ...
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... IS89C54/58/64 P2.6 P0[7-0] 1. EA#, PROG#, P3.7, P2.7 are high level; P3.6 is low level. Vcc — 0.5V 0.45V Note: 1.AC inputs during testing are driven at Vcc-0.5v for logic “1” and 0.45V for logic “0”. Timing measurements are made at Vih min for logic “1” and max for logic “0”. ...
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... ORDERING INFORMATION Commercial Range: 0°C to +70°C Speed Order Part Number 12 MHz IS89C54/58/64-12PL IS89C54/58/64-12W IS89C54/58/64-12PQ 24 MHz IS89C54/58/64-24PL IS89C54/58/64-24W IS89C54/58/64-24PQ 40 MHz IS89C54/58/64-40PL IS89C54/58/64-40W IS89C54/58/64-40PQ NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK, 24 Package PLCC 600mil DIP PQFP ...