SST29LE010 Silicon Storage Technology, Inc., SST29LE010 Datasheet

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SST29LE010

Manufacturer Part Number
SST29LE010
Description
Manufacturer
Silicon Storage Technology, Inc.
Datasheet

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FEATURES:
• Single Voltage Read and Write Operations
• Superior Reliability
• Low Power Consumption
• Fast Page-Write Operation
• Fast Read Access Time
PRODUCT DESCRIPTION
The SST29LE010 is a 128K x8 CMOS Page-Write
EEPROM manufactured with SST’s proprietary, high-per-
formance CMOS SuperFlash technology. The split-gate
cell design and thick-oxide tunneling injector attain better
reliability and manufacturability compared with alternate
approaches. The SST29LE010 writes with a single power
supply. Internal Erase/Program is transparent to the user.
The SST29LE010 conforms to JEDEC standard pinouts
for byte-wide memories.
Featuring high performance Page-Write, the SST29LE010
provides a typical Byte-Write time of 39 µsec. The entire
memory, i.e., 128 KByte, can be written page-by-page in as
little as 5 seconds, when using interface features such as
Toggle Bit or Data# Polling to indicate the completion of a
Write cycle. To protect against inadvertent write, the
SST29LE010 has on-chip hardware and Software Data
Protection schemes. Designed, manufactured, and tested
for a wide spectrum of applications, the SST29LE010 is
offered with a guaranteed Page-Write endurance of 10,000
cycles. Data retention is rated at greater than 100 years.
©2005 Silicon Storage Technology, Inc.
S71061(01)-00-EOL
1
– 3.0-3.6V for SST29LE010
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
– Active Current: 10 mA (typical) for 3.0V
– Standby Current: 10 µA (typical)
– 128 Bytes per Page, 1024 Pages
– Page-Write Cycle: 5 ms (typical)
– Complete Memory Rewrite: 5 sec (typical)
– Effective Byte-Write Cycle Time: 39 µs (typical)
– 3.0-3.6V operation: 150 ns
1 Mbit (128K x8) Page-Write EEPROM
SST29EE / LE / VE0101Mb (x8) Page-Write, Small-Sector flash memories
9/05
SST29LE010
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
• Latched Address and Data
• Automatic Write Timing
• End of Write Detection
• Hardware and Software Data Protection
• Product Identification can be accessed via
• TTL I/O Compatibility
• JEDEC Standard
• Packages Available
• All non-Pb (lead-free) devices are RoHS compliant
The SST29LE010 is suited for applications that require
convenient and economical updating of program, con-
figuration, or data memory. For all system applications,
the SST29LE010 significantly improves performance
and reliability, while lowering power consumption. The
SST29LE010 improves flexibility while lowering the
cost for program, data, and configuration storage
applications.
To meet high density, surface mount requirements, the
SST29LE010 is offered in a 32-lead PLCC and 32-lead
TSOP packages. See Figures 1 and 2 for pin assignments.
Device Operation
The SST Page-Write EEPROM offers in-circuit electrical
write capability. The SST29LE010 does not require sepa-
rate Erase and Program operations. The internally timed
Write cycle executes both Erase and Program transpar-
ently to the user. The SST29LE010 has industry standard
optional Software Data Protection, which SST recom-
mends always to be enabled. The SST29LE010 is compat-
ible with industry standard EEPROM pinouts and
functionality.
– Internal V
– Toggle Bit
– Data# Polling
Software Operation
– Flash EEPROM Pinouts and command sets
– 32-lead PLCC
– 32-lead TSOP (8mm x 14mm, 8mm x 20mm)
PP
Generation
These specifications are subject to change without notice.
SSF is a trademark of Silicon Storage Technology, Inc.
EOL Product Data Sheet

Related parts for SST29LE010

SST29LE010 Summary of contents

Page 1

... SST29LE010 improves flexibility while lowering the cost for program, data, and configuration storage applications. To meet high density, surface mount requirements, the SST29LE010 is offered in a 32-lead PLCC and 32-lead TSOP packages. See Figures 1 and 2 for pin assignments. Device Operation The SST Page-Write EEPROM offers in-circuit electrical write capability ...

Page 2

... Software Data Protection. Step 2 is the byte-load cycle to a page buffer of the SST29LE010. Steps 1 and 2 use the same timing for both operations. Step internally controlled Write cycle for writing the data loaded in the page buffer into the memory array for nonvolatile storage ...

Page 3

... Write cycle, otherwise the rejec- tion is valid. Data# Polling ( When the SST29LE010 is in the internal Write cycle, any attempt to read DQ of the last byte loaded during the byte- 7 load cycle will receive the complement of the true data. ...

Page 4

... The Proper Use of JEDEC Standard Software Data Protection Product Identification The Product Identification mode identifies the device as the SST29LE010 and manufacturer as SST. This mode is accessed via software. For details, see Table 4, Figure 10 for the software ID entry and read timing diagram and Figure 17, for the ID entry command sequence flowchart ...

Page 5

... Mbit Page-Write EEPROM SST29LE010 FIGURE SSIGNMENTS FOR A11 A13 4 A14 WE A16 10 A15 11 A12 FIGURE SSIGNMENTS FOR ©2005 Silicon Storage Technology, Inc ...

Page 6

... X can but no other value Device ID =08H for SST29LE010 ©2005 Silicon Storage Technology, Inc. Functions To provide memory addresses. Row addresses define a page for a Write cycle. Column Addresses are toggled to load page data To output data during Read cycles and receive input data during Write cycles. ...

Page 7

... SST Manufacturer’ BFH, is read with SST29LE010 Device ID = 08H, is read with A 6. Alternate six-byte Software Product ID command code Note: This product supports both the JEDEC standard three-byte command code sequence and SST’s original six-byte command code sequence. For new designs, SST recommends that the three-byte command code sequence be used. ...

Page 8

... V =GND µA V =GND to V OUT =100 µ 2 =-100 µ Mbit Page-Write EEPROM SST29LE010 +0.5V DD +2. f=1/T Min, ILT IHT, RC Max DD , WE#=V , all I/Os open OE#= Max Max ...

Page 9

... Mbit Page-Write EEPROM SST29LE010 TABLE ECOMMENDED YSTEM Symbol Parameter 1 T Power-up to Read Operation PU-READ 1 T Power-up to Write Operation PU-WRITE 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. TABLE 7: C APACITANCE (T = 25°C, f=1 Mhz, other pins open) ...

Page 10

... Software Chip-Erase SCE 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. ©2005 Silicon Storage Technology, Inc. SST29LE010 ARAMETERS FOR P IMING ARAMETERS 10 1 Mbit Page-Write EEPROM SST29LE010 Min Max Units 150 ns 150 ns 150 ns 60 ...

Page 11

... Mbit Page-Write EEPROM SST29LE010 ADDRESS A 16-0 CE# OE WE# HIGH-Z DQ 7-0 FIGURE EAD YCLE IMING Three-Byte Sequence for Enabling SDP ADDRESS A 16-0 5555 2AAA CE# OE# WE SW0 SW1 FIGURE 4: WE# C ONTROLLED ©2005 Silicon Storage Technology, Inc OLZ T CLZ ...

Page 12

... DATA VALID T DS SW2 BYTE 0 BYTE AGE RITE YCLE IMING IAGRAM OEH BLCO D IAGRAM 12 1 Mbit Page-Write EEPROM SST29LE010 T BLCO T WC BYTE 127 1061 F06.0 T OES D D# 1061 F07.0 S71061(01)-00-EOL 9/05 ...

Page 13

... Mbit Page-Write EEPROM SST29LE010 ADDRESS A 16-0 CE# T OEH OE# WE FIGURE OGGLE IT IMING ADDRESS A 14-0 5555 DQ 7-0 AA CE# OE WE# SW0 FIGURE OFTWARE ATA ©2005 Silicon Storage Technology, Inc BLCO D IAGRAM Six-Byte Sequence for Disabling Software Data Protection ...

Page 14

... BLC SW1 SW2 SW3 T D RASE IMING IAGRAM 5555 0000 IDA T BLC SW1 SW2 R EAD 14 1 Mbit Page-Write EEPROM SST29LE010 T SCE 5555 10 T BLCO SW4 SW5 1061 F10.0 0001 08 1061 F11.EOL S71061(01)-00-EOL 9/05 ...

Page 15

... Mbit Page-Write EEPROM SST29LE010 Three-Byte Sequence for Software ID Exit and Reset ADDRESS A 14-0 5555 DQ 7-0 AA CE# OE WE# SW0 FIGURE 11 OFTWARE XIT AND ©2005 Silicon Storage Technology, Inc. 2AAA 5555 IDA T BLC SW1 SW2 R ESET 15 EOL Product Data Sheet 1061 F12.0 ...

Page 16

... V LT (0.4 V) for a logic “0”. Measurement reference points for ILT (0.8 V). Input rise and fall times (10 EFERENCE AVEFORMS TO TESTER LOW 16 1 Mbit Page-Write EEPROM SST29LE010 V HT OUTPUT V LT 1061 F13.0 ↔ 90%) are <10 ns. Note Test HT HIGH Test ...

Page 17

... Mbit Page-Write EEPROM SST29LE010 See Figure 16 FIGURE 14 RITE LGORITHM ©2005 Silicon Storage Technology, Inc. Start Software Data Protect Write Command Set Page Address Set Byte Address = 0 Load Byte Data Increment Byte Address By 1 Byte No Address = 128? Yes Wait T BLCO Wait for end of ...

Page 18

... Page-Write Initiated Read a byte from page Read same byte No Does DQ 6 match? Yes Write Completed 18 1 Mbit Page-Write EEPROM SST29LE010 Data# Polling Page-Write Initiated Read DQ 7 (Data for last byte loaded true data? Yes Write Completed 1061 F16.0 S71061(01)-00-EOL ...

Page 19

... Mbit Page-Write EEPROM SST29LE010 Software Data Protect Enable Command Sequence Write data: AAH Address: 5555H Write data: 55H Address: 2AAAH Write data: A0H Address: 5555H Load 0 to 128 Bytes of page data Wait T BLCO Wait T WC SDP Enabled FIGURE 16 OFTWARE ATA © ...

Page 20

... Silicon Storage Technology, Inc. Software Product ID Exit & Reset Command Sequence Write data: AAH Address: 5555H Write data: 55H Address: 2AAAH Write data: F0H Address: 5555H Pause 10 µs Return to normal operation C F OMMAND LOWCHARTS 20 1 Mbit Page-Write EEPROM SST29LE010 1061 F18.0 S71061(01)-00-EOL 9/05 ...

Page 21

... Mbit Page-Write EEPROM SST29LE010 FIGURE 18 OFTWARE HIP ©2005 Silicon Storage Technology, Inc. Software Chip-Erase Command Sequence Write data: AAH Address: 5555H Write data: 55H Address: 2AAAH Write data: 80H Address: 5555H Write data: AAH Address: 5555H Write data: 55H ...

Page 22

... SST 29 LE 010 - XXXX - XXX Valid combinations for SST29LE010 SST29LE010-150-4C-NH SST29LE010-150-4C-WH SST29LE010-150-4C-NHE SST29LE010-150-4C-WHE SST29LE010-150-4C-EHE SST29LE010-150-4I-NH SST29LE010-150-4I-WH SST29LE010-150-4I-NHE SST29LE010-150-4I-WHE Note: Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combinations. ...

Page 23

... Mbit Page-Write EEPROM SST29LE010 PACKAGING DIAGRAMS TOP VIEW .495 .485 .453 Optional .447 Pin #1 .048 Identifier .042 .042 .048 .595 .553 .585 .547 .050 BSC Note: 1. Complies with JEDEC publication 95 MS-016 AE dimensions, although some dimensions may be more stringent. 2. All linear dimensions are in inches (max/min). ...

Page 24

... Maximum allowable mold flash is 0. the package ends, and 0.25 mm between leads. 32 LEAD HIN MALL UTLINE SST ACKAGE ODE ©2005 Silicon Storage Technology, Inc. 8.10 7.90 1.20 max. (TSOP ACKAGE Mbit Page-Write EEPROM SST29LE010 1.05 0.95 0.50 BSC 0.27 0.17 0.15 0.05 DETAIL 0˚- 5˚ 0.70 0.50 32-tsop-WH-7 1mm S71061(01)-00-EOL 9/05 ...

Page 25

... TABLE 11 EVISION ISTORY Number 07 • 2002 Data Book 08 • Removed 200 ns Read Access Time for SST29LE010 • Clarified I Write to be Program and Erase in Table 5 on page • 2004 Data Book • Added non-Pb MPNs and removed footnote (See page 22) 10 • ...

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