EDS1616AGTA-6B-E Elpida Memory, Inc., EDS1616AGTA-6B-E Datasheet

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EDS1616AGTA-6B-E

Manufacturer Part Number
EDS1616AGTA-6B-E
Description
Manufacturer
Elpida Memory, Inc.
Datasheet
Description
Features
EDS1616AGTA (1M words 16 bits)
16M bits SDRAM
DATA SHEET
Pin Configurations
VDDQ
VDDQ
LDQM
VSSQ
VSSQ
/CAS
/RAS
VDD
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VDD
LDQM, UDQM
CKE
CLK
VDD
VSS
VDDQ
VSSQ
NC
A0 to A10
BA
DQ0 to DQ15
/CS
/RAS
/CAS
/WE
/WE
A10
/CS
BA
A0
A1
A2
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
50-pin Plastic TSOP (II)
(Top view)
Input/output mask
Clock enable
Clock input
Power for internal circuit
Ground for internal circuit
Power for DQ circuit
Ground for DQ circuit
No connection
Address input
Bank select address
Data-input/output
Chip select
Row address strobe
Column address strobe
Write enable

50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
VSS
DQ15
DQ14
VSSQ
DQ13
DQ12
VDDQ
DQ11
DQ10
VSSQ
DQ9
DQ8
VDDQ
NC
UDQM
CLK
CKE
NC
A9
A8
A7
A6
A5
A4
VSS

Related parts for EDS1616AGTA-6B-E

EDS1616AGTA-6B-E Summary of contents

Page 1

... SDRAM EDS1616AGTA (1M words 16 bits) Description Features DATA SHEET Pin Configurations 50-pin Plastic TSOP (II) 1 VDD 2 DQ0 3 DQ1 4 VSSQ 5 DQ2 6 DQ3 7 VDDQ 8 DQ4 9 DQ5 10 VSSQ 11 DQ6 12 DQ7 13 VDDQ 14 LDQM 15 /WE 16 /CAS 17 /RAS 18 / A10 VDD ...

Page 2

... Ordering Information Part Number Elpida Memory Type D: Monolithic Device Product Family S: SDRAM Density / Bank 16: 16M/2-bank Organization 16: x16 Power Supply, Interface A: 3.3V, LVTTL Die Rev. EDS1616AGTA Environment Code E: Lead Free Speed 6B: 166MHz/CL3 100MHz/CL2 75: 133MHz/CL3 100MHz/CL2 Package TA: TSOP (II) ...

Page 3

... CONTENTS EDS1616AGTA ...

Page 4

... Exposing the device to stress above those listed in Absolute Maximum Ratings could cause permanent damage. The device is not meant to be operated under conditions outside the limits described in the operational section of this specification. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Recommended DC Operating Conditions ( + EDS1616AGTA ...

Page 5

... DC Characteristics 1 ( +70 C, VDD, VDDQ = 3.3V ± 0.3V, VSS, VSSQ = 0V) EDS1616AGTA   ...

Page 6

... DC Characteristics 2 ( +70 C, VDD, VDDQ = 3.3V ± 0.3V, VSS, VSSQ = 0V) Pin Capacitance (TA = 25°C, VDD, VDDQ = 3.3V ± 0.3V) EDS1616AGTA     ...

Page 7

... AC Characteristics ( +70 C, VDD, VDDQ = 3.3V ± 0.3V, VSS, VSSQ = 0V) EDS1616AGTA ...

Page 8

... Test Conditions AC high level voltage/low level input voltage: 2.4V/0.4V Input and output timing reference levels: 1.4V Input waveform and output load: See following figures 2.4 V 2.0 V input 0.8 V 0.4 V Data Sheet E0504E40 (Ver. 4.0) I Input waveform and Output load 8 EDS1616AGTA CL ...

Page 9

... Relationship Between Frequency and Minimum Latency EDS1616AGTA ...

Page 10

... Block Diagram CLK Clock Generator CKE Address Mode Register /CS /RAS /CAS /WE Bank 1 Row Address Buffer & Refresh Bank 0 Counter Sense Amplifier Column Decoder & Column Latch Circuit Address Buffer & Burst Data Control Circuit Counter EDS1616AGTA DQM DQ ...

Page 11

... Pin Function CLK (input pin) CKE (input pins) /CS (input pins) /RAS, /CAS, and /WE (input pins A10 (input pins) BA (input pin) [Bank Select Signal Table] UDQM and LDQM (input pins) DQ0 to DQ15 (input/output pins) VDD, VSS, VDDQ, VSSQ (Power supply) EDS1616AGTA ...

Page 12

... Command Operation Command Truth Table Device deselect command [DESL] No operation [NOP] Burst stop command [BST] Column address strobe and read command [READ] Read with auto-precharge [READA] Column address strobe and write command [WRIT] Write with auto-precharge [WRITA] EDS1616AGTA ...

Page 13

... Row address strobe and bank activate [ACT] Precharge selected bank [PRE] [Bank Select Signal Table] Precharge all banks [PALL] Refresh [REF/SELF] Mode register set [MRS] EDS1616AGTA ...

Page 14

... DQM Truth Table l l CKE Truth Table EDS1616AGTA ...

Page 15

... Function Truth Table EDS1616AGTA ...

Page 16

... EDS1616AGTA ...

Page 17

... EDS1616AGTA ...

Page 18

... Command Truth Table for CKE EDS1616AGTA ...

Page 19

... Clock suspend mode entry ACTIVE clock suspend READ suspend and READ with Auto-precharge suspend WRITE suspend and WRIT with Auto-precharge suspend Clock suspend Clock suspend mode exit IDLE Auto-refresh command [REF] Self-refresh entry [SELF] Power down mode entry Self-refresh exit Power down exit EDS1616AGTA ...

Page 20

... CLOCK SUSPEND CKE_ CKE ROW ACTIVE BST WRITE READ WRITE READ Read WITH WITH AP AP CKE_ READ WRITE READ WRITE CKE READ WRITE WITH AP WITH AP READ WITH AP PRECHARGE CKE_ WRITEA READA CKE PRECHARGE PRECHARGE PRECHARGE PRECHARGE EDS1616AGTA READ SUSPEND READA SUSPEND ...

Page 21

... LMODE BT A3 Burst type Sequential R 1 Interleave F.P.: Full Page R is Reserved (inhibit Mode Register Set EDS1616AGTA Burst length BT=0 BT ...

Page 22

... Burst Sequence EDS1616AGTA Interleave ...

Page 23

... Power-up sequence Power-up sequence Initialization sequence Power up sequence VDD, VDDQ 0 V Low CKE, DQM Low CLK Low /CS, DQ Power stabilize Power-up sequence and Initialization sequence Initialization sequence 100 s 200 s EDS1616AGTA ...

Page 24

... out 0 out out 0 out 1 out 2 out out 0 out 1 out 2 out out 3 out 0 out 1 out 2 out 3 out 0 out 1 out 2 /CAS Latency out 4 out 5 out 6 out 7 Burst Length EDS1616AGTA CL = /CAS latency Burst Length = Burst Length /CAS Latency = 2 ...

Page 25

... Command ACT WRIT Address Row Column CLK Command Address Row Burst write tRCD ACT WRIT Column in 0 Single write EDS1616AGTA ...

Page 26

... READA lRAS out0 out1 out2 READA lRAS out0 out1 ". ". Burst Read ( WRITA lRAS in0 in1 in2 in3 lDAL ". ". Burst Write ( EDS1616AGTA l ACT out3 lAPR ACT out2 out3 lAPR l ACT ...

Page 27

... CLK Command ACT lRAS DQ Note: Internal auto-precharge starts at the timing indicated by " and an interval of tRAS (lRAS) is required between previous active (ACT) command and internal precharge " ". Single Write EDS1616AGTA WRITA ACT in lDAL ". ...

Page 28

... Burst Stop Command CLK READ Command CLK Command WRITE DQ in BST out out out out out Burst Stop at Read Burst Stop at Write EDS1616AGTA High-Z High-Z out BST High-Z ...

Page 29

... Bank0 Bank1 Bank0 Active Active Read READ to READ Command Interval (different bank) out A0 out B0 out B1 out B2 out B3 Column =B Column =A Read Dout Dout READ Column B out A0 out B0 out B1 out B2 out B3 Bank0 Bank1 Bank1 Dout Dout Read EDS1616AGTA Bank ...

Page 30

... ACT WRIT Address Column A Row 1 Row Bank0 Bank1 Bank0 Active Active Write WRITE to WRITE Command Interval (different bank Write WRIT Column Bank1 Write EDS1616AGTA Burst Write Mode Bank 0 Burst Write Mode ...

Page 31

... CLK Command CL=2 UDQM LDQM CL=3 DQ (input) DQ (output) READ to WRITE Command Interval (1) CLK Command UDQM LDQM CL=2 DQ CL=3 READ to WRITE Command Interval (2) READ WRIT High-Z READ WRIT 2 clock out out out in in out out in in EDS1616AGTA Burst write ...

Page 32

... A1 DQ (output) Column = A Write WRITE to READ Command Interval (2) READ out B0 out B1 /CAS Latency Column = B Dout READ out B0 out B1 /CAS Latency Column = B Column = B Read Dout EDS1616AGTA out B2 out B3 Burst Write Mode Bank 0 out B2 out B3 Burst Write Mode Bank 0 ...

Page 33

... bank0 Write A Note: Internal auto-precharge starts at the timing indicated by " Write with Auto Precharge to Write Command Interval (Different bank) READ out A0 out A1 out B0 bank1 Read ". WRIT bank1 Write ". EDS1616AGTA out B1 CL BL= 4 ...

Page 34

... A0 DQ (output) bank0 bank1 WriteA Read Note: Internal auto-precharge starts at the timing indicated by " Write with Auto Precharge to Read Command Interval (Different bank) WRIT High-Z bank1 Write out B0 out B1 EDS1616AGTA ". out B2 out ". ...

Page 35

... READ to PRECHARGE Command Interval (same bank): To stop output data ( CLK PRE/PALL READ Command DQ READ to PRECHARGE Command Interval (same bank): To stop output data ( PRE/PALL out A0 out A1 out A2 out A3 lEP = -1 cycle PRE/PALL out A0 out A1 out A2 CL=3 lEP = -2 cycle High-Z out A0 lHZP = 2 High-Z out A0 lHZP =3 EDS1616AGTA l out A3 ...

Page 36

... WRIT Command UDQM LDQM WRITE to PRECHARGE Command Interval (same bank) ( (To stop write operation)) CLK Command WRIT UDQM LDQM WRITE to PRECHARGE Command Interval (same bank) ( (To write all data)) PRE/PALL in A2 tDPL PRE/PALL tDPL EDS1616AGTA ...

Page 37

... Mode register set to Bank active command interval CLK Command Address Mode register set to Bank active command interval tRC ACT ACT ROW:1 tRRD Bank 1 Active Active MRS ACT OPCODE BS & ROW lMRD Mode Bank Register Set Active EDS1616AGTA ACT ROW Bank 0 Active l ...

Page 38

... DQM Control Reading Writing CLK UDQM LDQM DQ CLK UDQM LDQM DQ High-Z out 0 out 1 out 3 lDOD = 2 Latency Reading lDID = 0 Latency Writing EDS1616AGTA in 3 ...

Page 39

... Refresh Auto-refresh Self-refresh Others Power-down mode Clock suspend mode EDS1616AGTA ...

Page 40

... AC tOH tOH tOH tOH tLZ Bank 0 Precharge EDS1616AGTA tSI tHI tSI tHI tSI tHI tSI tHI tSI tHI tSI tHI tSI tHI /CAS latency = 2 Burst length = 4 Bank 0 access = VIH or VIL ...

Page 41

... Precharge b’ High-Z lMRD lRCD Output mask Bank 1 Bank 1 Active Read EDS1616AGTA tRP tSI tHI tSI tHI tSI tHI tSI tHI tSI tHI tSI tHI tSI tHI Bank 0 access = VIH or VIL 13 14 ...

Page 42

... Bank 0 Active Write Read R:b C:a C a+1 a+3 Bank 0 Bank 0 Bank 1 Write Write Active EDS1616AGTA Read cycle /RAS-/CAS delay = 3 /CAS latency = 3 Burst length = 4 = VIH or VIL b"+1 b"+2 b"+3 Bank 1 Precharge Write cycle /RAS-/CAS delay = 3 /CAS latency = 3 Burst length = 4 = VIH or VIL ...

Page 43

... Write R:b C:a a a+1 a+2 a+3 a a+1 a+3 Bank 0 Bank 1 Write Active High Auto Refresh EDS1616AGTA Bank 0 Bank 1 Precharge Precharge Bank 0 Precharge Read/Burst write /RAS-/CAS delay = 3 /CAS latency = 3 Burst length = 4 = VIH or VIL C:a R:a a a+1 ...

Page 44

... C:b High-Z a a+1 a+2 a+3 b b+1 b+2 b+3 Bank0 Bank0 Bank1 Write suspend Write suspend Bank1 Precharge Write Active start end Write EDS1616AGTA t RC Self refresh cycle Auto Next /RAS-/CAS delay = 3 refresh clock enable VIH or VIL Read cycle /RAS-/CAS delay = 2 /CAS latency = 2 ...

Page 45

... Power down entry Power down mode exit Active Bank High Auto Refresh EDS1616AGTA Power down cycle /RAS-/CAS delay = 3 /CAS latency = 3 Burst length = 4 = VIH or VIL code Valid lMRD Bank active Mode register If needed ...

Page 46

... Plastic TSOP (ll) 1 20.95 ± 0.15 PIN 0.80 0.30 to 0.45 0. 0.875 0. Note: 1. This dimension does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15mm per side EDS1616AGTA Unit: mm 0.80 Nom 0.25 0.50 ± 0.10 ECA-TS2-0139-01 ...

Page 47

... Recommended Soldering Conditions Type of Surface Mount Device EDS1616AGTA ...

Page 48

... ON, the MOS devices with reset function have not yet been initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. MOS devices are not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for MOS devices having reset function. EDS1616AGTA CME0107 ...

Page 49

... If these products/technology are sold, leased, or transferred to a third party third party is granted license to use these products, that third party must be made aware that they are responsible for compliance with the relevant laws and regulations. EDS1616AGTA M01E0107 ...

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