MT28F800B3WG-8B Micron Semiconductor Products, MT28F800B3WG-8B Datasheet

no-image

MT28F800B3WG-8B

Manufacturer Part Number
MT28F800B3WG-8B
Description
8Mb SMART 3 BOOT BLOCK FLASH MEMORY
Manufacturer
Micron Semiconductor Products
Datasheet
FLASH MEMORY
FEATURES
• Eleven erase blocks:
• Smart 3 technology (B3):
• Compatible with 0.3µm Smart 3 device
• Advanced 0.18µm CMOS floating-gate process
• Address access time: 80ns
• 100,000 ERASE cycles
• Industry-standard pinouts
• Inputs and outputs are fully TTL-compatible
• Automated write and erase algorithm
• Two-cycle WRITE/ERASE sequence
• TSOP, SOP and FBGA packaging options
• Byte- or word-wide READ and WRITE
OPTIONS
• Timing
• Configurations
• Boot Block Starting Word Address
• Operating Temperature Range
• Packages
NOTE:
8Mb Smart 3 Boot Block Flash Memory
Q10_2.p65 – Rev. 2, Pub. 3/01
(MT28F800B3):
80ns access
Top (7FFFFh)
Bottom (00000h)
Commercial (0ºC to +70ºC)
Extended (-40ºC to +85ºC)
40-pin TSOP Type I (MT28F008B3)
48-pin TSOP Type I (MT28F800B3)
44-pin SOP (MT28F800B3)
1 Meg x 8
16KB/8K-word boot block (protected)
Two 8KB/4K-word parameter blocks
Eight main memory blocks
3.3V ±0.3V V
3.3V ±0.3V V
5V ±10% V
1 Meg x 8/512K x 16
512K x 16/1 Meg x 8
1. This generation of devices does not support 12V V
compatibility production programming; however, 5V V
application production programming can be used with no
loss of performance.
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.
MT28F800B3WG-8 BET
PP
CC
PP
application/production programming
Part Number Example:
application programming
MT28F008B3
MT28F800B3
MARKING
None
WG
VG
SG
ET
-8
B
T
PP
SMART 3 BOOT BLOCK FLASH MEMORY
PP
1
1
MT28F008B3
MT28F800B3
3V Only, Dual Supply (Smart 3)
GENERAL DESCRIPTION
low-voltage, nonvolatile, electrically block-erasable (flash),
programmable memory devices containing 8,388,608 bits
organized as 524,288 words (16 bits) or 1,048,576 bytes (8
bits). Writing and erasing the device is done with a V
voltage of either 3.3V or 5V, while all operations are
performed with a 3.3V V
advances, 5V V
programming. These devices are fabricated with Micron’s
advanced 0.18µm CMOS floating-gate process.
into eleven separately erasable blocks. To ensure that
critical firmware is protected from accidental erasure or
overwrite, the devices feature a hardware-protected
boot block. This block may be used to store code imple-
mented in low-level system recovery. The remaining
blocks vary in density and are written and erased with
no additional security measures.
for the latest data sheet.
40-Pin TSOP Type I 48-Pin TSOP Type I
The MT28F008B3 (x8) and MT28F800B3 (x16/x8) are
The MT28F008B3 and MT28F800B3 are organized
Refer to Micron’s Web site (www.micron.com/flash)
PP
is optimal for application and production
44-Pin SOP
CC
. Due to process technology
©2001, Micron Technology, Inc.
8Mb
PP

Related parts for MT28F800B3WG-8B

MT28F800B3WG-8B Summary of contents

Page 1

... V application production programming can be used with no loss of performance. Part Number Example: MT28F800B3WG-8 BET 8Mb Smart 3 Boot Block Flash Memory Q10_2.p65 – Rev. 2, Pub. 3/01 PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE. SMART 3 BOOT BLOCK FLASH MEMORY ...

Page 2

... ORDER NUMBER AND PART MARKING MT28F800B3WG-8 B MT28F800B3WG-8 T MT28F800B3WG-8 BET MT28F800B3WG-8 TET 8Mb Smart 3 Boot Block Flash Memory Q10_2.p65 – Rev. 2, Pub. 3/01 SMART 3 BOOT BLOCK FLASH MEMORY PIN ASSIGNMENT (Top View) 48 A16 47 BYTE DQ15/( ...

Page 3

BYTE# I/O Control Logic Addr. A0–A18/(A19) Buffer/ Latch A9 Power (Current) Control 1 WP# CE# Command OE# Execution WE# Logic RP NOTE: 1. Does not apply to MT28F800B3SG. 2. Does not apply to MT28F008B3. FUNCTIONAL ...

Page 4

PIN DESCRIPTIONS 44-PIN SOP 40-PIN TSOP 48-PIN TSOP NUMBERS NUMBERS NUMBERS – – 47 11, 10 21, 20, 19, 18, 25, 24, 23, ...

Page 5

TRUTH TABLE (MT28F800B3) FUNCTION Standby RESET READ READ (word mode) READ (byte mode) Output Disable WRITE/ERASE (EXCEPT BOOT BLOCK) ERASE SETUP 3 ERASE CONFIRM WRITE SETUP 4 WRITE (word mode) 4 WRITE (byte mode) 5 READ ARRAY WRITE/ERASE (BOOT BLOCK) ...

Page 6

TRUTH TABLE (MT28F008B3) FUNCTION Standby RESET READ READ Output Disable WRITE/ERASE (EXCEPT BOOT BLOCK) ERASE SETUP 3 ERASE CONFIRM WRITE SETUP 4 WRITE 5 READ ARRAY WRITE/ERASE (BOOT BLOCK) ERASE SETUP 3 ERASE CONFIRM 3, 6 ERASE CONFIRM WRITE SETUP ...

Page 7

FUNCTIONAL DESCRIPTION The MT28F800B3 and MT28F008B3 Flash devices in- corporate a number of features ideally suited for system firmware. The memory array is segmented into indi- vidual erase blocks. Each block may be erased without affecting data stored in other ...

Page 8

Commands may be issued to the CEL while the ISM is active. However, there are restrictions on what commands are allowed in this condition. See the Command Execution section for more detail. DEEP POWER-DOWN MODE To allow for ...

Page 9

The MT28F800B3 and MT28F008B3 are available in two configurations and top or bottom boot block. The top boot block version supports processors of the x86 variety. The bottom boot block version is intended for 680X0 and RISC applications. Figure 1 ...

Page 10

More information describ- ing how to use the two types of inputs to write or erase the device is provided in the Command Execution sec- tion. COMMANDS To perform a command input, OE# must be ...

Page 11

ISM STATUS REGISTER The 8-bit ISM status register (see Table 2) is polled to check for WRITE or ERASE completion or any related errors. During or following a WRITE, ERASE or ERASE SUSPEND, a READ operation outputs the status register ...

Page 12

COMMAND EXECUTION Commands are issued to bring the device into differ- ent operational modes. Each mode allows specific opera- tions to be performed. Several modes require a sequence of commands to be written before they are reached. The following section ...

Page 13

BYTE# is LOW, or FFFFh must be written when BYTE# is HIGH. When the ISM status bit (SR7) has been set, the device is in the status register read mode until another command is issued. ERASE SEQUENCE Executing an ...

Page 14

WRITE/ERASE CYCLE ENDURANCE The MT28F800B3 and MT28F008B3 are designed and fabricated to meet advanced firmware storage require- ments. To ensure this level of reliability, V 3.3V ±0. ±10% during WRITE or ERASE cycles. Due to process technology advances, ...

Page 15

SELF-TIMED WRITE SEQUENCE (WORD OR BYTE WRITE) Start WRITE 40h or 10h WRITE Word or Byte Address/Data STATUS REGISTER READ SR7 = 1? YES Complete Status Check (optional) WRITE Complete NOTE: 1. Sequence may ...

Page 16

SELF-TIMED BLOCK ERASE SEQUENCE Start WRITE 20h WRITE D0h, Block Address STATUS REGISTER READ NO SR7 = 1? Suspend ERASE? YES 2 Complete Status Check (optional) 3 ERASE Complete NOTE: 1. Sequence may be ...

Page 17

Smart 3 Boot Block Flash Memory Q10_2.p65 – Rev. 2, Pub. 3/01 SMART 3 BOOT BLOCK FLASH MEMORY ERASE SUSPEND/RESUME SEQUENCE Start (ERASE in progress) WRITE B0h (ERASE SUSPEND 3. STATUS REGISTER READ NO ...

Page 18

ABSOLUTE MAXIMUM RATINGS* Voltage on V Supply CC Relative to V ..................................... -0.5V to +4V** SS Input Voltage Relative to V .................... -0.5V to +4V Voltage Relative to V ........................ -0.5V to +5. RP ...

Page 19

CAPACITANCE (T = 25º MHz) A PARAMETER/CONDITION Input Capacitance Output Capacitance READ AND STANDBY CURRENT DRAIN Commercial Temperature (0ºC PARAMETER/CONDITION READ CURRENT: WORD-WIDE (CE# 0.2V; OE 0.2V MHz; CC Other inputs 0.2V ...

Page 20

READ TIMING PARAMETERS ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS Commercial Temperature (0ºC AC CHARACTERISTICS PARAMETER READ cycle time Access time from CE# Access time from OE# Access time from address RP# HIGH to output valid delay OE# or CE# ...

Page 21

V IH A0–A18/(A19 DQ0–DQ15 RWH TIMING PARAMETERS Commercial Temperature (0ºC Extended Temperature (-40ºC ...

Page 22

V IH A0–A18/(A19 DQ0–DQ7 DQ8–DQ14 RP TIMING PARAMETERS Commercial Temperature (0ºC ...

Page 23

RECOMMENDED DC WRITE/ERASE CONDITIONS Commercial Temperature (0ºC PARAMETER/CONDITION V WRITE/ERASE lockout voltage PP V voltage during WRITE/ERASE operation PP V voltage during WRITE/ERASE operation PP Boot block unlock voltage V WRITE/ERASE lockout voltage CC WRITE/ERASE CURRENT DRAIN Commercial Temperature (0ºC ...

Page 24

SPEED-DEPENDENT WRITE/ERASE AC TIMING CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS: WE# (CE#)-CONTROLLED WRITES Commercial Temperature (0ºC AC CHARACTERISTICS PARAMETER WRITE cycle time WE# (CE#) HIGH pulse width WE# (CE#) pulse width Address setup time to WE# (CE#) HIGH Address hold ...

Page 25

V IH A0–A18/(A19) Note DQ0–DQ7/ CMD 2 DQ0–DQ15 ...

Page 26

V IH A0–A18/(A19) Note CMD DQ0–DQ7/ 2 DQ0–DQ15 ...

Page 27

TYP 1 PIN #1 INDEX .010 (0.25) .006 (0.15) 20 .007 (0.18) .005 (0.13) NOTE: 1. All dimensions in inches (millimeters) MAX or typical where noted. 2. Package width and length do not include mold protrusion; allowable mold ...

Page 28

TYP 1 PIN #1 INDEX .010 (0.25) .006 (0.15) 24 .007 (0.18) .005 (0.12) NOTE: 1. All dimensions in inches (millimeters) MAX or typical where noted. 2. Package width and length do not include mold protrusion; allowable mold ...

Page 29

TYP PIN #1 INDEX NOTE: 1. All dimensions in inches (millimeters) MAX or typical where noted. 2. Package width and length do not include mold protrusion; allowable mold protrusion is .01” per side. 8000 ...

Page 30

REVISION HISTORY Rev. 2 .................................................................................................................................................................................... 3/01 • Changed to 0.18µm process • 12V V no longer supported PP • 10V V 12V HH • 0. • RWH changed to 1µs from 800ns t • ...

Related keywords