MT55L128L36F1T-10 Micron Semiconductor Products, MT55L128L36F1T-10 Datasheet
MT55L128L36F1T-10
Related parts for MT55L128L36F1T-10
MT55L128L36F1T-10 Summary of contents
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ZBT SRAM FEATURES • High frequency and 100 percent bus utilization • Fast cycle times: 10ns, 11ns, and 12ns • Single +3.3V ±5% power supply (V • Separate +3.3V or +2.5V isolated output buffer supply ( ...
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ADDRESS SA0, SA1, SA REGISTER MODE CE CLK K CKE# ADV/LD# BWa# BWb# R/W# OE# CE# CE2 CE2# 17 ADDRESS SA0, SA1, SA REGISTER MODE CE CLK K CKE# ADV/LD# BWa# BWb# BWc# BWd# R/W# OE# CE# CE2 CE2# ...
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GENERAL DESCRIPTION ® The Micron Zero Bus Turnaround family employs high-speed, low-power CMOS designs using an advanced CMOS process. Micron’s 4Mb ZBT SRAMs integrate a 256K x 18, 128K x 32, or 128K x 36 SRAM core with advanced synchronous ...
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TQFP PIN ASSIGNMENT TABLE PIN # x18 x32 x36 PIN # DQc DQc DQc DQc DQc DQc DQc 31 ...
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NF** 83 NF** 84 ADV/LD# 85 OE# (G#) 86 CKE# 87 R/W# 88 CLK CE2# 92 BWa# 93 BWb CE2 97 CE ...
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TQFP PIN DESCRIPTIONS x18 x32/x36 32-35, 44-50, 32-35, 44-50, 80-82, 99, 100 81, 82, 99, 100 – 95 – ...
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TQFP PIN DESCRIPTIONS (continued) x18 x32/x36 88 88 (a) 58, 59, 62, 63, (a) 52, 53, 56-59, 68, 69, 72-74 62 12, 13, (b) 68, 69, 72-75, 18, 19, 22-24 78 6-9, ...
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CE# BWb# NC CE2# CKE CE2 NC BWa# CLK R/ ...
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FBGA PIN DESCRIPTIONS x18 x32/x36 SYMBOL 2A, 2B, 3P, 3R, 2A, 2B, 3P, 3R, 4P, 4R, 8P, 8R, 4P, 4R, 8P, 8R, 9P, 9R, 10A, 9P, 9R, 10A, 10B, 10P, 10B, 10P, 10R, 11A, 11R 10R, ...
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FBGA PIN DESCRIPTIONS (continued) x18 x32/x36 SYMBOL 8A 8A ADV/LD# Input Synchronous Address Advance/Load: When HIGH, this input MODE (LB0#) (a) 10J, 10K, (a) 10J, 10K, 10L, 10M, 11D, 10L, 10M, 11J, 11E, 11F, 11G 11K, 11L, ...
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FBGA PIN DESCRIPTIONS (continued) x18 x32/x36 SYMBOL 1H, 4C, 4N, 5C, 1H, 4C, 4N, 5C, 5D, 5E 5F, 5D, 5E 5F, 5G, 5H, 5J, 5G, 5H, 5J, 5K, 5L, 5M, 5K, 5L, 5M, 6C, 6D, 6E, 6F, 6C, 6D, 6E, ...
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ADSP CE2** SA ADSC DQb DQb V CE ...
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BGA PIN DESCRIPTIONS x32/x36 2A, 3A, 5A, 2A, 2C, 2R, 6A, 3B, 5B, 3A, 3B, 3C, 2C, 3C, 5C, 3T, 4T, ...
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BGA PIN DESCRIPTIONS (continued x32/x36 ADV#/LD# Input Synchronous Address Advance/Load: When HIGH, this input ...
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BGA PIN DESCRIPTIONS (continued x32/x36 3D, 3E, 3F, 3D, 3E, 3F, 3H, 3K, 3L, 3H, 3K, 3M, 3M, 3N, 3P, 3N, 3P, 5D, 5D, 5E, 5F, 5E, ...
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INTERLEAVED BURST ADDRESS TABLE (MODE = NC OR HIGH) FIRST ADDRESS (EXTERNAL) SECOND ADDRESS (INTERNAL) X...X00 X...X01 X...X10 X...X11 LINEAR BURST ADDRESS TABLE (MODE = LOW) FIRST ADDRESS (EXTERNAL) SECOND ADDRESS (INTERNAL) X...X00 X...X01 X...X10 X...X11 PARTIAL TRUTH TABLE FOR ...
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DS BEGIN READ READ READ BURST BURST READ KEY: COMMAND DS READ WRITE BURST NOTE STALL or IGNORE CLOCK EDGE cycle is not shown in the above diagram. This is because CKE# HIGH only blocks the clock (CLK) ...
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TRUTH TABLE (Notes 5-10) OPERATION DESELECT Cycle DESELECT Cycle DESELECT Cycle CONTINUE DESELECT Cycle READ Cycle (Begin Burst) READ Cycle (Continue Burst) NOP/DUMMY READ (Begin Burst) DUMMY READ (Continue Burst) WRITE Cycle (Begin Burst) WRITE Cycle (Continue Burst) NOP/WRITE ABORT ...
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ABSOLUTE MAXIMUM RATINGS* Voltage on V Supply DD Relative to V ............................... -0.5V to +4.6V SS Voltage Supply DD Relative to V .......................................... -0. ........................................... -0. Storage Temperature (plastic) ............ ...
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I/O DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS (0°C ≤ T ≤ +70° +3.3V ±0.165V DESCRIPTION Input High (Logic 1) Voltage Input Low (Logic 0) Voltage Input Leakage Current Output Leakage Current Output High Voltage ...
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I OPERATING CONDITIONS AND MAXIMUM LIMITS DD (Note 1) (0°C ≤ T ≤ +70° DESCRIPTION CONDITIONS Device selected; All inputs ≤ V Power Supply or ≥ Cycle time ≥ Current: IH Operating V = MAX; ...
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TQFP THERMAL RESISTANCE DESCRIPTION Thermal Resistance Test conditions follow standard test methods (Junction to Ambient) Thermal Resistance (Junction to Top of Case) BGA THERMAL RESISTANCE DESCRIPTION Junction to Ambient Test conditions follow standard test methods (Airflow of 1m/s) Junction to ...
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AC ELECTRICAL CHARACTERISTICS (Notes (0°C ≤ T ≤ +70° DESCRIPTION Clock Clock cycle time Clock frequency Clock HIGH time Clock LOW time Output Times Clock to output valid Clock to output invalid Clock to output ...
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I/O AC TEST CONDITIONS Input pulse levels ................................... V Input rise and fall times ..................................... 1ns Input timing reference levels .......................... 1.5V Output reference levels ................................... 1.5V Output load ............................. See Figures 1 and 2 3.3V I/O Output Load ...
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SNOOZE MODE SNOOZE MODE is a low-current, “power-down” mode in which the device is deselected and current is reduced The duration of SNOOZE MODE dictated by the length of time the ZZ pin is ...
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CLK t EVKH t KHEX t KHKL CKE# t CVKH t KHCX CE# ADV/LD# R/W# BWx ADDRESS t AVKH t KHAX DQ D(A1) t DVKH t KHDX OE# COMMAND WRITE WRITE D(A1) D(A2) READ/WRITE TIMING PARAMETERS ...
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CLK CKE# CE# ADV/LD# R/W# BWx ADDRESS D(A1) DQ COMMAND WRITE READ D(A1) Q(A2) NOP, STALL, AND DESELECT TIMING PARAMETERS -10 -11 SYM MIN MAX MIN MAX t KHQX 3.0 3.0 t KHQZ 5.0 5.0 NOTE: ...
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PIN #1 ID 14.00 ±0.10 +0.20 16.00 -0.05 NOTE: 1. All dimensions in millimeters MAX or typical where noted. 2. Package width and length do not include mold protrusion; allowable mold protrusion is 0.25mm per side. 4Mb: 256K x 18, ...
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BALL A11 165X Ø 0.45 SOLDER BALL DIAMETER REFERS TO POST REFLOW CONDITION. THE PRE-REFLOW DIAMETER IS Ø 0.40 7.50 ±0.05 15.00 ±0.10 7.00 ±0.05 5.00 ±0.05 NOTE: 1. All dimensions in millimeters MAX or typical where noted. ...
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A1 CORNER 0.75 ±0.15 Ø A1 CORNER 20.32 NOTE: 1. All dimensions in millimeters MAX or typical where noted. 2. Solder ball land pad is 0.6mm. 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, ...
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REVISION HISTORY Removed note "Not Recommended for New Designs," Rev. 6/01 ................................................................ June 7/01 Added Industrial Temperature note and references, Rev. 3/01, FINAL ..................................................... March 6/01 Added 119-pin PBGA package, Rev. 1/01, FINAL ................................................................................. January 10/01 Removed FBGA Part Marking ...