ATtiny48 Atmel Corporation, ATtiny48 Datasheet - Page 122

• Manufacturer Part Number: ATtiny48
• Manufacturer: Atmel Corporation

Specifications of ATtiny48

• Flash (kbytes): 4 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 12 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 28
• Ext Interrupts: 28
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

122
ATtiny48/88
When the SPI is enabled, the data direction of the MOSI, MISO, SCK, and SS pins is overridden
according to
“Alternate Port Functions” on page
Table 14-1.
Note:
The following code examples show how to initialize the SPI as a Master and how to perform a
simple transmission. DDR_SPI in the examples must be replaced by the actual Data Direction
Register controlling the SPI pins. DD_MOSI, DD_MISO and DD_SCK must be replaced by the
actual data direction bits for these pins. E.g. if MOSI is placed on pin PB5, replace DD_MOSI
with DDB5 and DDR_SPI with DDRB.
Note:
Assembly Code Example
MOSI
MISO
SCK
SPI_MasterInit:
SPI_MasterTransmit:
Wait_Transmit:
Pin
SS
; Set MOSI and SCK output, all others input
ldi
out
; Enable SPI, Master, set clock rate fck/16
ldi
out
ret
; Start transmission of data (r16)
out
; Wait for transmission complete
sbis SPSR,SPIF
rjmp Wait_Transmit
ret
1. See
1.
direction of the user defined SPI pins.
See ”About Code Examples” on page 7.
Table 14-1 on page
r17,(1<<DD_MOSI)|(1<<DD_SCK)
DDR_SPI,r17
r17,(1<<SPE)|(1<<MSTR)|(1<<SPR0)
SPCR,r17
SPDR,r16
SPI Pin Overrides
“Alternate Functions of Port B” on page 69
Direction, Master SPI
User Defined
Input
User Defined
User Defined
(1)
(1)
122. For more details on automatic port overrides, refer to
65.
for a detailed description of how to define the
Direction, Slave SPI
Input
User Defined
Input
Input
8008H–AVR–04/11