ATxmega128B3 Atmel Corporation, ATxmega128B3 Datasheet - Page 142
ATxmega128B3
Manufacturer Part Number
ATxmega128B3
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega128B3
Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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12.13.15 PINnCTRL – Pin n Configuration Register
8291A–AVR–10/11
• Bit 4 – USART0: USART0 Remap
Setting this bit to one will move the pin location of USART0 from Px[3:0] to Px[7:4].
• Bit 3 – TC0D: Timer/Counter 0 Output Compare D
Setting this bit will move the location of OC0D from Px3 to Px7.
• Bit 2 – TC0C: Timer/Counter 0 Output Compare C
Setting this bit will move the location of OC0C from Px2 to Px6.
• Bit 1 – TC0B: Timer/Counter 0 Output Compare B
Setting this bit will move the location of OC0B from Px1 to Px5. If this bit is set and PWM from
both timer/counter 0 and timer/counter 1 is enabled, the resulting PWM will be an OR-modula-
tion between the two PWM outputs.
• Bit 0 – TC0A: Timer/Counter 0 Output Compare A
Setting this bit will move the location of OC0A from Px0 to Px4. If this bit is set and PWM from
both timer/counter 0 and timer/counter 1 is enabled, the resulting PWM will be an OR-modula-
tion between the two PWM outputs. See
Figure 12-11. I/O timer/counter.
• Bit 7 – SRLEN: Slew Rate Limit Enable
Setting this bit will enable slew rate limiting on pin n.
• Bit 6 – INVEN: Inverted I/O Enable
Setting this bit will enable inverted output and input data on pin n.
• Bit 5:3 – OPC: Output and Pull Configuration
These bits set the output/pull configuration on pin n according to
Bit
Read/Write
Initial Value
OC0A
OC1A
OCA
SRLEN
R/W
7
0
INVEN
R/W
6
0
R/W
5
0
OPC[2:0]
Figure
R/W
4
0
12-11.
R/W
3
0
Atmel AVR XMEGA B
R/W
2
0
Table
ISC[2:0]
R/W
12-4.
1
0
R/W
0
0
PINnCTRL
142
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