ATxmega192A3 Atmel Corporation, ATxmega192A3 Datasheet - Page 379

no-image

ATxmega192A3

Manufacturer Part Number
ATxmega192A3
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega192A3

Flash (kbytes)
192 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
16
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATxmega192A3-AU
Manufacturer:
TOSHIBA
Quantity:
1 200
Part Number:
ATxmega192A3-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATxmega192A3-MH
Manufacturer:
TI/NSC
Quantity:
56
Part Number:
ATxmega192A3U-AU
Manufacturer:
MSDS
Quantity:
124
Part Number:
ATxmega192A3U-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATxmega192A3U-AUR
Manufacturer:
Atmel
Quantity:
10 000
30.12 External Programming
8077H–AVR–12/09
External Programming is the method for programming non volatile code and data into the device
from an external programmer or debugger. This can be done both in-system (In-System Pro-
gramming) or in mass production programming. The only restrictions on clock speed and voltage
is the maximum and minimum operating conditions for the device. Refer to the device data sheet
for details on this.
For external programming the device is accessed through the PDI and PDI Controller, using
either the JTAG or PDI physical connection. For details on PDI and JTAG and how to enable
and use the physical interface, refer to
remainder of this section assumes that the correct physical connection to the PDI is enabled.
Through the PDI, the external programmer access all NVM memories and NVM Controller using
the PDI Bus. Doing this all data and program memory spaces are mapped into the linear PDI
memory space.
for each memory space in the device.
Figure 30-4 on page 380
”Program and Debug Interface” on page
shows the PDI memory space and the base address
XMEGA A
344. The
379

Related parts for ATxmega192A3