ATxmega64A1 Atmel Corporation, ATxmega64A1 Datasheet - Page 114

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ATxmega64A1

Manufacturer Part Number
ATxmega64A1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64A1

Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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10.6
10.6.1
8077H–AVR–12/09
Register Description
CTRL: Battery Backup Control Register
1. Set the ACCEN bit and apply a RESET
1. Enable the Crystal oscillator.
2. Wait until Crystal Oscillator ready flag is set.
3. Enable XOSC Fault Detection.
4. Configure and enable the RTC32.
• Bit [7:5] - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 4- XOSCSEL: 32-kHz Crystal Oscillator Output Selection
This bit selects which clock output from the 32.768 kHz crystal oscillator that will be used as
clock input for the 32-bit Real Time Counter (RTC).
By default this bit is zero, and the 1 Hz clock output is used as input for the RTC. Setting this bit
will select the 1.024 kHz clock output as input for the RTC. The Crystal Oscillator must be
enabled before the output is available. This bit cannot be changed when XOSCEN is set.
• Bit 3- XOSCEN: Crystal Oscillator Enable
Setting this bit will enable the 32.768 kHz crystal oscillator, and thSetting this bite default 1 Hz
output from the oscillator. Writing the bit to zero will have no effect. The oscillator will remain
enabled until a Battery Backup RESET is issued.
• Bit 2- XOSCFDEN: Crystal Oscillator Failure DSetting this bitetection Enable
Setting this bit will enable the 32.768 kHz crystal oscillator monitor. Writing the bit to zero will
have no effect. When enabled, the Crystal Oscillator Monitor will remain enabled until a Battery
Backup RESET is issued.
• Bit 1- ACCEN: Battery Backup Module Access Enable
Setting this bit will enable access to the Battery Backup Module. After main reset this bit must be
set in order to access (read from and write to) the battery backup domain functions and register
settings, except for the BBPODF, the BBBODF and the BBPWR flag.
• Bit 0- RESET: Battery Backup Reset
Setting this bit will force a reset of the Battery Backup Module. Writing the bit to zero will have no
effect. Writing a one to the XOSCEN or the XOSCFDEN bit the same time will block writing to
this bit. When this bit is set XOSCEN, XOSCFDEN, XOSCSEL, and XOSCRDY in STATUS will
be cleared.
Bit
+0x00
Read/Write
Reset Value
7
-
R
0
6
-
R
0
5
-
R
0
XOSCSEL
R/W
4
0
XOSCEN
R/W
3
0
XOSCFDEN
R/W
2
0
ACCEN
R/W
1
0
RESET
XMEGA A
R/W
0
0
CTRL
114

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