ATxmega64A3 Atmel Corporation, ATxmega64A3 Datasheet - Page 254

• Manufacturer Part Number: ATxmega64A3
• Manufacturer: Atmel Corporation

Specifications of ATxmega64A3

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Speed: No
• Usb Interface: No
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

21.15.6
21.15.7
8077H–AVR–12/09
BAUDCTRLA - USART Baud Rate Register
BAUDCTRLB - USART Baud Rate Register
• Bit 2 - UDORD: Data Order
This bit sets the frame format. When written to one the LSB of the data word is transmitted first.
When written to zero the MSB of the data word is transmitted first. The Receiver and Transmitter
use the same setting. Changing the setting of UDORD will corrupt all ongoing communication for
both receiver and transmitter.
• Bit 1 - UCPHA: Clock Phase
The UCPHA bit setting determine if data is sampled on the leading (first) edge or tailing (last)
edge of XCKn. Refer to the
• Bit 7:0 - BSEL[7:0]: USART Baud Rate Register
This is a 12-bit value which contains the USART baud rate setting. The BAUDCTRLB contains
the four most significant bits, and the BAUDCTRLA contains the eight least significant bits of the
USART baud rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if
the baud rate is changed. Writing BAUDCTRLA will trigger an immediate update of the baud rate
prescaler.
• Bit 7:4 - BSCALE[3:0]: USART Baud Rate Scale factor
These bits select the Baud Rate Generator scale factor. The scale factor is given in two's com-
plement form from -7 (0b1001) to 7 (0b0111). The -8 (0b1000) setting is reserved. For positive
scale values the Baud Rate Generator is prescaled by 2
Rate Generator will use fractional counting, which increases the resolution. See equations in
Table 21-1 on page
• Bit 3:0 - BSEL[3:0]: USART Baud Rate Register
This is a 12-bit value which contains the USART baud rate setting. The BAUDCTRLB contains
the four most significant bits, and the BAUDCTRLA contains the eight least significant bits of the
USART baud rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if
the baud rate is changed. Writing BAUDCTRLA will trigger an immediate update of the baud rate
prescaler.
Bit
+0x07
Read/Write
Initial Value
Bit
+0x06
Read/Write
Initial Value
R/W
R/W
7
0
7
0
238.
R/W
R/W
6
0
6
0
BSCALE[3:0]
”SPI Clock Generation” on page 239
R/W
R/W
5
0
5
0
R/W
R/W
4
0
4
0
BSEL[7:0]
R/W
R/W
3
0
3
0
BSCALE
R/W
R/W
2
0
2
0
BSEL[11:8]
. For negative values the Baud
for details.
R/W
R/W
1
0
1
0
XMEGA A
R/W
R/W
0
0
0
0
BAUDCTRLA
BAUDCTRLB
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