SAM3N2C Atmel Corporation, SAM3N2C Datasheet - Page 215

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SAM3N2C

Manufacturer Part Number
SAM3N2C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3N2C

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Figure 12-6. Watchdog Reset
12.4.5
215
WDRPROC = 0
SAM3N
Reset State Priorities
Only if
periph_nreset
proc_nreset
The Reset State Manager manages the following priorities between the different reset sources,
given in descending order:
Particular cases are listed below:
(nrst_out)
• General Reset
• Backup Reset
• Watchdog Reset
• Software Reset
• User Reset
• When in User Reset:
• When in Software Reset:
• When in Watchdog Reset:
RSTTYP
wd_fault
NRST
SLCK
MCK
– A watchdog event is impossible because the Watchdog Timer is being reset by the
– A software reset is impossible, since the processor reset is being activated.
– A watchdog event has priority over the current state.
– The NRST has no effect.
– The processor reset is active and so a Software Reset cannot be programmed.
– A User Reset cannot be entered.
proc_nreset signal.
Freq.
Any
Any
Processor Startup
= 2 cycles
XXX
EXTERNAL RESET LENGTH
8 cycles (ERSTL=2)
0x2 = Watchdog Reset
11011A–ATARM–04-Oct-10

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