SAM3N2C Atmel Corporation, SAM3N2C Datasheet - Page 63

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SAM3N2C

Manufacturer Part Number
SAM3N2C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3N2C

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
10.5.8
10.6
10.6.1
10.6.1.1
10.6.1.2
10.6.1.3
10.6.1.4
10.6.2
10.6.2.1
11011A–ATARM–04-Oct-10
Exception model
Programming hints for the synchronization primitives
Exception states
Exception types
Inactive
Pending
Active
Active and pending
Reset
ANSI C cannot directly generate the exclusive access instructions. Some C compilers provide
intrinsic functions for generation of these instructions:
Table 10-8.
The actual exclusive access instruction generated depends on the data type of the pointer
passed to the intrinsic function. For example, the following C code generates the require
LDREXB operation:
This section describes the exception model.
Each exception is in one of the following states:
The exception is not active and not pending.
The exception is waiting to be serviced by the processor.
An interrupt request from a peripheral or from software can change the state of the correspond-
ing interrupt to pending.
An exception that is being serviced by the processor but has not completed.
An exception handler can interrupt the execution of another exception handler. In this case both
exceptions are in the active state.
The exception is being serviced by the processor and there is a pending exception from the
same source.
The exception types are:
Reset is invoked on power up or a warm reset. The exception model treats reset as a special
form of exception. When reset is asserted, the operation of the processor stops, potentially at
any point in an instruction. When reset is deasserted, execution restarts from the address pro-
Instruction
LDREX, LDREXH, or
LDREXB
STREX, STREXH, or
STREXB
CLREX
__ldrex((volatile char *) 0xFF);
C compiler intrinsic functions for exclusive access instructions
unsigned int __ldrex(volatile void *ptr)
int __strex(unsigned int val, volatile void *ptr)
Intrinsic function
void __clrex(void)
SAM3N
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