SAM3N2C Atmel Corporation, SAM3N2C Datasheet - Page 495

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SAM3N2C

Manufacturer Part Number
SAM3N2C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3N2C

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
28.11.3
Name:
Addresses: 0x40018008 (0), 0x4001C008 (1)
Access:
Reset:
• SADR: Slave Address
The slave device address is used in Slave mode in order to be accessed by master devices in read or write mode.
SADR must be programmed before enabling the Slave mode or after a general call. Writes at other times have no effect.
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
31
23
15
7
TWI Slave Mode Register
TWI_SMR
Read-write
0x00000000
30
22
14
6
29
21
13
5
28
20
12
4
SADR
27
19
11
3
26
18
10
2
25
17
9
1
SAM3N
SAM3N
24
16
8
0
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