SAM3S16C Atmel Corporation, SAM3S16C Datasheet - Page 309
SAM3S16C
Manufacturer Part Number
SAM3S16C
Description
Manufacturer
Atmel Corporation
Datasheet
1.SAM3S16C.pdf
(1130 pages)
Specifications of SAM3S16C
Flash (kbytes)
1024 Kbytes
Pin Count
100
Max. Operating Frequency
100 MHz
Cpu
Cortex-M3
# Of Touch Channels
39
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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20.5.1
Name:
Address:
Access:
Offset:
• FRDY: Ready Interrupt Enable
0: Flash Ready does not generate an interrupt.
1: Flash Ready (to accept a new command) generates an interrupt.
• FWS: Flash Wait State
This field defines the number of wait states for read and write operations:
• SCOD: Sequential Code Optimization Disable
0: The sequential code optimization is enabled.
1: The sequential code optimization is disabled.
No Flash read should be done during change of this register.
• FAM: Flash Access Mode
0: 128-bit access in read Mode only, to enhance access speed.
1: 64-bit access in read Mode only, to enhance power consumption.
No Flash read should be done during change of this register.
• CLOE: Code Loops Optimization Enable
0: The opcode loops optimization is disabled.
1: The opcode loops optimization is enabled.
No Flash read should be done during change of this register.
11117B–ATARM–18-Oct-11
11117B–ATARM–18-Oct-11
Number of cycles for Read/Write operations = FWS+1
31
23
15
–
–
–
7
–
EEFC Flash Mode Register
30
22
14
EEFC_FMR
0x400E0A00
Read-write
0x00
–
–
–
6
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
27
19
11
–
–
3
–
CLOE
26
18
10
–
2
–
FWS
25
17
–
–
9
1
–
SAM3S16
SAM3S16
SCOD
FRDY
FAM
24
16
8
0
267
267
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