SAM3S16C Atmel Corporation, SAM3S16C Datasheet - Page 509

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SAM3S16C

Manufacturer Part Number
SAM3S16C
Description
Manufacturer
Atmel Corporation
Datasheet

Specifications of SAM3S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
Max. Operating Frequency
100 MHz
Cpu
Cortex-M3
# Of Touch Channels
39
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Table 30-3.
Notes:
Note:
467
467
Offset
0x150
0x154
0x158
0x15C
0x160
0x164
0x0168
to
0x018C
1. Reset value depends on the product implementation.
2. PIO_ODSR is Read-only or Read/Write depending on PIO_OWSR I/O lines.
3. Reset value of PIO_PDSR depends on the level of the I/O lines. Reading the I/O line levels requires the clock of the PIO
4. PIO_ISR is reset at 0x0. However, the first read of the register may read a different value as input changes may have
if an offset is not listed in the table it must be considered as reserved.
SAM3S16
SAM3S16
Controller to be enabled, otherwise PIO_PDSR reads the levels present on the I/O line at the time the clock was disabled.
occurred.
Register
Parallel Capture Mode Register
Parallel Capture Interrupt Enable Register
Parallel Capture Interrupt Disable Register
Parallel Capture Interrupt Mask Register
Parallel Capture Interrupt Status Register
Parallel Capture Reception Holding Register
Reserved for PDC Registers
Register Mapping (Continued)
Name
PIO_PCMR
PIO_PCIMR
PIO_PCRHR
PIO_PCIER
PIO_PCIDR
PIO_PCISR
Read-write
Read-only
Read-only
Read-only
Write-only
Write-only
Access
11117B–ATARM–18-Oct-11
11117B–ATARM–18-Oct-11
0x00000000
0x00000000
0x00000000
0x00000000
Reset

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