SAM3S16C Atmel Corporation, SAM3S16C Datasheet - Page 563

• Manufacturer Part Number: SAM3S16C
• Manufacturer: Atmel Corporation

Specifications of SAM3S16C

• Flash (kbytes): 1024 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 100 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 39
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

31.8.1
11117B–ATARM–18-Oct-11
11117B–ATARM–18-Oct-11
Write Protection Registers
To prevent any single software error that may corrupt SSC behavior, certain address spaces can
be write-protected by setting the WPEN bit in the
(SSC_WPMR).
If a write access to the protected registers is detected, then the WPVS flag in the SSC Write Pro-
tect Status Register (US_WPSR) is set and the field WPVSRC indicates in which register the
write access has been attempted.
The WPVS flag is reset by writing the SSC Write Protect Mode Register (SSC_WPMR) with the
appropriate access key, WPKEY.
The protected registers are:
•
•
•
•
•
•
•
“SSC Clock Mode Register” on page 524
“SSC Receive Clock Mode Register” on page 525
“SSC Receive Frame Mode Register” on page 527
“SSC Transmit Clock Mode Register” on page 529
“SSC Transmit Frame Mode Register” on page 531
“SSC Receive Compare 0 Register” on page 537
“SSC Receive Compare 1 Register” on page 538
“SSC Write Protect Mode Register”
SAM3S16
SAM3S16
521
521