SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 25

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

8.1.1.2
8.1.2
8.1.2.1
8.1.2.2
6289CS–ATARM–28-May-09
Boot Strategies
Internal ROM
BMS = 1, boot on embedded ROM
BMS = 0, boot on external memory
When accessed from the AHB, the internal Fast SRAM is single cycle accessible at full matrix
speed (MCK). When accessed from the processor’s TCM Interface, they are also single cycle
accessible at full processor speed.
The AT91SAM9R64/RL64 embeds an Internal ROM, which contains the SAM-BA program.
At any time, the ROM is mapped at address 0x0040 0000. It is also accessible at address 0x0
(BMS =1) after the reset and before the Remap Command.
The system always boots at address 0x0. To ensure maximum boot possibilities, the memory
layout can be changed with two parameters.
REMAP allows the user to layout the internal SRAM bank to 0x0 to ease the development. This
is done by software once the system has boot. Refer to the Bus Matrix Section for more details.
When REMAP = 0 BMS allows the user to lay out to 0x0, at his convenience, the ROM or an
external memory. This is done by a hardware way at reset.
Note: All the memory blocks can always be seen at their specified base addresses that are not
concerned by these parameters.
The AT91SAM9R64/RL64 Bus Matrix manages a boot memory that depends on the level on the
pin BMS at reset. The internal memory area mapped between address 0x0 and 0x000F FFFF is
reserved to this effect.
If BMS is detected at 1, the boot memory is the embedded ROM.
If BMS is detected at 0, the boot memory is the memory connected on the Chip Select 0 of the
External Bus Interface.
The system boots on Boot Program.
• Boot on on-chip RC
• Enable the 32768 Hz oscillator
• Auto baudrate detection
• Downloads and runs an application from external storage media into internal SRAM
• Downloaded code size depends on embedded SRAM size
• Automatic detection of valid application
• Bootloader on a non-volatile memory
• SAM-BA Boot in case no valid program is detected in external NVM, supporting
• Boot on on-chip RC
– SDCard (boot ROM does not support high-capacity SDCards)
– NAND Flash
– SPI DataFlash
– Serial communication on a DBGU
– USB Device HS Port
®
connected on NPCS0 of the SPI0
AT91SAM9R64/RL64
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