SAM3X8C

Manufacturer Part NumberSAM3X8C
ManufacturerAtmel Corporation
SAM3X8C datasheets

Availability: In stock

International delivery:

Warranty: 60 days

Shipping & payment terms

Added to cart

Select quantity

 
SAM3A4C PDF datasheetSAM3A4C PDF datasheet #2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Page 21
22
Page 22
23
Page 23
24
Page 24
25
Page 25
26
Page 26
27
Page 27
28
Page 28
29
Page 29
30
Page 30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
Page 29/72

Download datasheet (2Mb)Embed
PrevNext
6.4
NRST Pin
The NRST pin is bidirectional. It is handled by the on-chip reset controller and can be driven low
to provide a reset signal to the external components, or asserted low externally to reset the
microcontroller. It will reset the Core and the peripherals except the Backup region (RTC, RTT
and Supply Controller). There is no constraint on the length of the reset pulse, and the reset con-
troller can guarantee a minimum pulse length.
The NRST pin integrates a permanent pull-up resistor to VDDIO of about 100 kΩ.
6.5
NRSTB Pin
The NRSTB pin is input only and enables asynchronous reset of the SAM3X/A series when
asserted low. The NRSTB pin integrates a permanent pull-up resistor of about 15 kΩ. This allows
connection of a simple push button on the NRSTB pin as a system-user reset. In all modes, this
pin will reset the chip including the Backup region (RTC, RTT and Supply Controller). It reacts as
the Power-on reset. It can be used as an external system reset source. In harsh environments, it
is recommended to add an external capacitor (10 nF) between NRSTB and VDDBU. (For filter-
ing values, refer to “I/O characteristics” in the “Electrical Characteristics” section of the product
datasheet)
It embeds an anti-glitch filter.
6.6
ERASE Pin
The ERASE pin is used to reinitialize the Flash content (and some of its NVM bits) to an erased
state (all bits read as logic level 1). It integrates a pull-down resistor of about 100 kΩ to GND, so
that it can be left unconnected for normal operations.
This pin is debounced by SCLK to improve the glitch tolerance. When the ERASE pin is tied high
during less than 100 ms, it is not taken into account. The pin must be tied high during more than
220 ms to perform a Flash erase operation.
The ERASE pin is a system I/O pin and can be used as a standard I/O. At startup, the ERASE
pin is not configured as a PIO pin. If the ERASE pin is used as a standard I/O, the startup level
of this pin must be low to prevent unwanted erasing. Please refer to
Signal Multiplexing on I/O
asserting the pin to low does not erase the Flash.
11057AS–ATARM–10-Feb-12
11057AS–ATARM–10-Feb-12
Lines”. Also, if the ERASE pin is used as a standard I/O output,
SAM3X/A
SAM3X/A
Section 11.2 “Peripheral
31
31

Related parts for SAM3X8C

Part Number Manufacturer Datasheet
  SAM3X4C Atmel Corporation
  SAM3X4E Atmel Corporation
  SAM3X8E Atmel Corporation
  SAM3N1A Atmel Corporation
  SAM3N1B Atmel Corporation
  SAM3N1C Atmel Corporation
  SAM3N2A Atmel Corporation
  SAM3N2B Atmel Corporation
  SAM3N2C Atmel Corporation
  SAM3N4A Atmel Corporation
  SAM3N4B Atmel Corporation
  SAM3N4C Atmel Corporation
  SAM3S16C Atmel Corporation
  SAM3S1A Atmel Corporation
  SAM3S1B Atmel Corporation