AD5669R Analog Devices, AD5669R Datasheet

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AD5669R

Manufacturer Part Number
AD5669R
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD5669R

Resolution (bits)
16bit
Dac Update Rate
166kSPS
Dac Settling Time
6µs
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Voltage Out
Dac Input Format
I2C/Ser 2-wire,Ser

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
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Manufacturer:
Analog Devices Inc
Quantity:
135
Part Number:
AD5669RBRUZ-2
Manufacturer:
Analog Devices Inc
Quantity:
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Part Number:
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FEATURES
Low power octal DACs
16-lead LFCSP and 16-lead TSSOP
On-chip 1.25 V/2.5 V, 5 ppm/°C reference
Power down to 400 nA at 5 V, 200 nA at 3 V
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to zero scale or midscale
3 power-down functions
Hardware LDAC and CLR functions
I
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
GENERAL DESCRIPTION
The AD5629R/AD5669R devices are low power, octal, 12-/16-
bit, buffered voltage-output DACs. All devices are guaranteed
monotonic by design.
The AD5629R/AD5669R have an on-chip reference with an
internal gain of 2. The AD5629R-1/AD5669R-1 have a 1.25 V,
5 ppm/°C reference, giving a full-scale output range of 2.5 V.
The AD5629R-2/AD5629R-3 and the AD5669R-2/AD5669R-3
have a 2.5 V 5 ppm/°C reference, giving a full-scale output range
of 5 V depending on the option selected. Devices with 1.25 V
reference selected operate from a single 2.7 V to 5.5 V supply.
Devices with 2.5 V reference selected operate from 4.5 V to 5.5 V.
The on-chip reference is off at power-up, allowing the use of an
external reference. The internal reference is enabled via a
software write.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
2
C-compatible serial interface supports standard (100 kHz)
AD5629R: 12 bits
AD5669R: 16 bits
and fast (400 kHz) modes
with 5 ppm/°C On-Chip Reference
Octal, 12-/16-Bit, I
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
SDA
The parts incorporate a power-on reset circuit to ensure that the
DAC output powers up to 0 V (AD5629R-1/AD5629R-2,
AD5669R-1/AD5669R-2) or midscale (AD5629R-3/AD5669R-3)
and remains powered up at this level until a valid write takes
place. The part contains a power-down feature that reduces the
current consumption of the device to 400 nA at 5 V and
provides software-selectable output loads while in power-down
mode for any or all DAC channels.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
SCL
A0
Octal, 12-/16-bit DACs.
On-chip 1.25 V/2.5 V, 5 ppm/°C reference.
Available in 16-lead LFCSP and TSSOP.
Power-on reset to 0 V or midscale.
Power-down capability. When powered down, the DAC
typically consumes 200 nA at 3 V and 400 nA at 5 V.
LDAC
AD5629R/AD5669R
LDAC
CLR
FUNCTIONAL BLOCK DIAGRAM
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
POWER-ON RESET
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
AD5629R/AD5669R
©2010 Analog Devices, Inc. All rights reserved.
V
DD
Figure 1.
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
DAC
DAC
DAC
DAC
DAC
DAC
DAC
DAC
2
C, denseDACs
POWER-DOWN LOGIC
V
REFIN
STRING
STRING
STRING
STRING
STRING
STRING
STRING
STRING
DAC A
DAC B
DAC C
DAC D
DAC E
DAC F
DAC G
DAC H
/V
REFOUT
1.25V/2.5V REF
www.analog.com
GND
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
V
V
V
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
A
B
C
D
E
F
G
H

Related parts for AD5669R

AD5669R Summary of contents

Page 1

... DACs. All devices are guaranteed monotonic by design. The AD5629R/AD5669R have an on-chip reference with an internal gain of 2. The AD5629R-1/AD5669R-1 have a 1. ppm/°C reference, giving a full-scale output range of 2.5 V. The AD5629R-2/AD5629R-3 and the AD5669R-2/AD5669R-3 have a 2 ppm/°C reference, giving a full-scale output range depending on the option selected ...

Page 2

... AD5629R/AD5669R TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 AC Characteristics........................................................................ Timing Characteristics.......................................................... 7 Absolute Maximum Ratings............................................................ 9 ESD Caution.................................................................................. 9 Pin Configuration and Function Descriptions........................... 10 Typical Performance Characteristics ........................................... 11 Terminology .................................................................................... 18 Theory of Operation ...................................................................... 20 Digital-to-Analog Converter (DAC) Section ......................... 20 REVISION HISTORY 12/10— ...

Page 3

... Rev Page AD5629R/AD5669R unless otherwise noted. MIN MAX Unit Test Conditions/Comments Bits LSB See Figure 6 LSB Guaranteed monotonic by design (see Figure 8) Bits LSB See Figure 5 LSB Guaranteed monotonic by design ...

Page 4

... DD 1 Temperature range is −40°C to +105°C, typical at 25°C. 2 Linearity calculated using a reduced code range of the AD5629R (Code 32 to Code 4064) and the AD5669R (Code 512 to 65,024). Output unloaded. 3 Guaranteed by design and characterization; not production tested. 4 Interface inactive. All DACs active. DAC outputs unloaded. ...

Page 5

... Rev Page AD5629R/AD5669R unless otherwise noted. MIN MAX Unit Conditions/Comments Bits LSB See Figure 6 LSB Guaranteed monotonic by design (see Figure 8) Bits LSB See Figure 5 LSB Guaranteed monotonic by design (see Figure 7) ...

Page 6

... DD 1 Temperature range is −40°C to +105°C, typical at 25°C. 2 Linearity calculated using a reduced code range of the AD5629R (Code 32 to Code 4064) and the AD5669R (Code 512 to 65,024). Output unloaded. 3 Guaranteed by design and characterization; not production tested. 4 Interface inactive. All DACs active. DAC outputs unloaded. ...

Page 7

... SCL signal FCL 300 ns ns LDAC pulse width low ns ns Falling edge of ninth SCL clock pulse of last byte of a valid write to the LDAC falling edge ns ns CLR pulse width low Pulse width of spike suppressed Rev Page AD5629R/AD5669R ...

Page 8

... AD5629R/AD5669R t 2 SCL SDA LDAC* CLR *ASYNCHRONOUS LDAC UPDATE MODE Figure 2. Serial Write Operation Rev Page ...

Page 9

... Exposure to absolute maximum rating conditions for extended periods may affect + 0 device reliability ESD CAUTION − T )/θ J MAX A JA Rev Page AD5629R/AD5669R ...

Page 10

... Analog Output Voltage from DAC E. The output amplifier has rail-to-rail operation. Analog Output Voltage from DAC G. The output amplifier has rail-to-rail operation. The AD5629R/AD5669R have a common pin for reference input and reference output. When using the internal reference, this is the reference output pin. When using an external reference, this is the reference input pin ...

Page 11

... CODES Figure 8. DNL AD5629R—External Reference V DD INT REF = 2. 25° 10k 20k 30k 40k 50k CODES Figure 9. INL AD5669R-2—Internal Reference V DD INT REF = 2. 25° 500 1000 1500 2000 2500 3000 CODES Figure 10. INL AD5629R-2—Internal Reference ...

Page 12

... CODES Figure 14. INL AD5629R-1—Internal Reference V DD INT REF = 1.25V T = 25° 10k 20k 30k 40k 50k CODES Figure 15. DNL AD5669R-1—Internal Reference V DD INT REF = 1.25V T = 25° 500 1000 1500 2000 2500 3000 CODES Figure 16. DNL AD5629R-1—Internal Reference ...

Page 13

... Figure 20. Zero-Code Error and Offset Error vs. Supply Voltage 110 125 0. 25° 5.1 5.5 1.65 Rev Page AD5629R/AD5669R T A OFFSET ERROR ZERO-CODE ERROR 3.1 3.5 3.9 4.3 4.7 5.1 V (V) DD 0.90 0.95 1.00 I WITH EXTERNAL REFERENCE (mA) DD Figure 21. I Histogram with External Reference DD 1.70 1.75 1.80 1.85 I WITH INTERNAL REFERENCE (mA) DD Figure 22 ...

Page 14

... Figure 24. AD5669R-2 Source and Sink Capability 4 INT REF = 1.25V 3 25°C A 3.0 FULL SCALE 2.5 3/4 SCALE 2.0 1.5 MIDSCALE 1.0 1/4 SCALE 0.5 ZERO CODE 0 –0.5 –1.0 –0.03 –0.02 –0.01 0 SOURCE AND SINK CURRENT (mA) Figure 25. AD5669R-1 Source and Sink Capability 0.01 0.02 0.03 0.01 0.02 0.03 Rev Page 1 25°C A 1.7 1 1.5 1 1.3 1.2 1.1 1 ...

Page 15

... CH3 10.0mV Figure 34. Digital-to-Analog Glitch Impulse (Negative) Rev Page AD5629R/AD5669R EXT REF = 25° OUT –0.0006 –0.0002 0.0002 0.0006 TIME (s) Figure 32. Power-On Reset to Midscale CLK RISING EDGE ...

Page 16

... AD5629R/AD5669R 0.0010 EXT REF = 25°C A 0.0005 0 –0.0005 –0.0010 –0.0015 TIME (µs) Figure 35. Analog Crosstalk 0.0020 0.0015 0.0010 0.0005 0 –0.0005 –0.0010 –0.0015 TIME (µs) Figure 36. DAC-to-DAC Crosstalk 0. 5.5V DD ...

Page 17

... Figure 45. 1.25 V Reference Temperature Coefficient vs. Temperature 2.503 EXT REF = 5V 2.502 2.501 2.500 2.499 2.498 2.497 2.496 2.495 10 Figure 46. 2.5 V Reference Temperature Coefficient vs. Temperature Rev Page AD5629R/AD5669R 5. EXT REF = 25° – ...

Page 18

... OUT OUT region of the transfer function. Offset error is measured on the AD5669R between Code 512 and Code 65024 loaded into the DAC register. It can be negative or positive and is expressed in millivolts. Zero-Code Error Zero-code error is a measure of the output error when zero code (0x0000) is loaded into the DAC register ...

Page 19

... Total harmonic distortion is the difference between an ideal sine wave and its attenuated version using the DAC. The sine wave is used as the reference for the DAC, and the THD is a measure of the harmonics present on the DAC output measured in decibels. Rev Page AD5629R/AD5669R ...

Page 20

... INTERNAL REFERENCE V OUT The AD5629R/AD5669R have an on-chip reference with an internal gain of 2. The AD5629R-1/AD5669R-1 have a 1. ppm/°C reference, giving a full-scale output of 2 the AD5629R-2/AD5629R-3/AD5669R-2/AD5629R-3 have a 2 ppm/°C reference, working between a supply from 4 5.5 V giving a full-scale output The on-board reference is off at power-up, allowing the use of an external reference ...

Page 21

... WRITE OPERATION When writing to the AD5629R/AD5669R, the user must begin with a start command followed by an address byte ( 0), after which the DAC acknowledges that it is prepared to receive data by pulling SDA low. The AD5629R/AD5669R require two bytes of data for the DAC and a command byte that controls various DAC functions ...

Page 22

... Figure 52) while the AD5629R data word is comprised of 12- bits followed by four don’t cares (see Figure 53). MULTIPLE BYTE OPERATION Multiple byte operation is supported on the AD5629R/ AD5669R. Command 1001 is reserved for multiple byte operation (see Table 8) A 2-byte operation is useful for applications that require fast DAC updating and do not need to change the command byte ...

Page 23

... The AD5629R/AD5669R contain a power-on reset circuit that controls the output voltage during power-up. The AD5629R/ AD5669R DAC output powers and the AD5669R-3 DAC output powers up to midscale. The output remains powered up at this level until a valid write sequence is made to the DAC ...

Page 24

... LDAC low the value in the DAC register before powering down ( LDAC high). CLEAR CODE REGISTER The AD5629R/AD5669R have a hardware CLR pin that is an asynchronous clear input. The CLR input is falling edge sensitive. Bringing the CLR line low clears the contents of the ...

Page 25

... Don’t cares Power- don’t cares down mode DB19 DB18 DB17 Address bits (A3 to A0)—don’t cares Rev Page AD5629R/AD5669R DB8 DB7 to DB1 PD0 DAC H to DAC B Power-down/power-up channel selection— set bit select DB16 DB15 to DB2 DB1 X X CR1 Don’ ...

Page 26

... The printed circuit board containing the AD5629R/AD5669R should have separate analog and digital sections. If the AD5629R/ AD5669R are in a system where other devices require an AGND-to-DGND connection, the connection should be made Figure 2 ...

Page 27

... SEATING BSC PLANE COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 56. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters Rev Page AD5629R/AD5669R 16 1 2.70 PAD 2. 0.20 MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET ...

Page 28

... AD5669RBRUZ-2-RL7 −40°C to +105°C AD5669RACPZ-2-RL7 −40°C to +105°C AD5669RACPZ-3-RL7 −40°C to +105°C AD5669RBCPZ-1-RL7 −40°C to +105°C AD5669RBCPZ-2-RL7 −40°C to +105°C AD5669RBCPZ-1500R7 −40°C to +105°C AD5669RBCPZ-2500R7 −40°C to +105°C EVAL-AD5629REBRZ EVAL-AD5669REBRZ RoHS Compliant Part ...

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