AD9751 Analog Devices, AD9751 Datasheet - Page 10

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AD9751

Manufacturer Part Number
AD9751
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD9751

Resolution (bits)
10bit
Dac Update Rate
300MSPS
Dac Settling Time
11ns
Max Pos Supply (v)
+3.6V
Single-supply
Yes
Dac Type
Current Out
Dac Input Format
Par

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AD9751
FUNCTIONAL DESCRIPTION
Figure 3 shows a simplified block diagram of the AD9751. The
AD9751 consists of a PMOS current source array capable of
providing up to 20 mA of full-scale current, I
divided into 31 equal sources that make up the five most signifi-
cant bits (MSBs). The next four bits, or middle bits, consist of
15 equal current sources whose value is 1/16th of an MSB cur-
rent source. The remaining LSB is a binary weighted fraction of
the middle bit current sources. Implementing the middle and
lower bits with current sources, instead of an R-2R ladder,
enhances dynamic performance for multitone or low amplitude
signals and helps maintain the DAC’s high output impedance
(i.e., >100 kΩ).
All of the current sources are switched to one or the other of the
two outputs (i.e., I
switches. The switches are based on a new architecture that
significantly improves distortion performance. This new switch
architecture reduces various timing errors and provides match-
ing complementary drive signals to the inputs of the differential
current switches.
The analog and digital sections of the AD9751 have separate
power supply inputs (i.e., AVDD and DVDD) that can operate
independently over a 3.0 V to 3.6 V range. The digital section,
which is capable of operating at a 300 MSPS clock rate, consists
of edge-triggered latches and segment decoding logic circuitry.
The analog section includes the PMOS current sources, the
associated differential switches, a 1.20 V band gap voltage refer-
ence, and a reference control amplifier.
The full-scale output current is regulated by the reference
control amplifier and can be set from 2 mA to 20 mA via an
external resistor, R
with both the reference control amplifier and voltage reference
V
segmented current sources with the proper scaling factor. The
full-scale current, I
REFIO
, sets the reference current I
0.1 F
R
OUTA
SET
2k
OUTFS
SET
. The external resistor, in combination
or I
, is 32 times the value of I
REFIO
FSADJ
DCOM
OUTB
1.2V REF
ACOM
) via PMOS differential current
AD9751
REF
3.0V TO 3.6V
DVDD
, which is replicated to the
PMOS CURRENT
SOURCE ARRAY
OUTFS
AVDD
PORT 1 LATCH
Figure 3. Simplified Block Diagram
DB0 – DB9
REF
. The array is
DIGITAL DATA INPUTS
.
SWITCHES FOR
SEGMENTED
DAC LATCH
DB0 TO DB9
2 –1 MUX
PORT 2 LATCH
–10–
DB0 – DB9
DAC
REFERENCE OPERATION
The AD9751 contains an internal 1.20 V band gap reference.
This can easily be overdriven by an external reference with no
effect on performance. REFIO serves as either an input or output,
depending on whether the internal or an external reference is
used. To use the internal reference, simply decouple the REFIO
pin to ACOM with a 0.1 µF capacitor. The internal reference
voltage will be present at REFIO. If the voltage at REFIO is to
be used elsewhere in the circuit, an external buffer amplifier with
an input bias current less than 100 nA should be used. An example
of the use of the internal reference is shown in Figure 4.
A low impedance external reference can be applied to REFIO,
as shown in Figure 5. The external reference may provide either
a fixed reference voltage to enhance accuracy and drift perfor-
mance or a varying reference voltage for gain control. Note that
the 0.1 µF compensation capacitor is not required since the inter-
nal reference is overdriven, and the relatively high input impedance
of REFIO minimizes any loading of the external reference.
REFERENCE CONTROL AMPLIFIER
The AD9751 also contains an internal control amplifier that is
used to regulate the DAC’s full-scale output current, I
The control amplifier is configured as a voltage-to-current con-
verter as shown in Figure 4, so that its current output, I
determined by the ratio of V
as stated in Equation 4. I
sources with the proper scaling factor to set I
Equation 3.
The control amplifier allows a wide (10:1) adjustment span of
I
62.5 µA and 625 µA. The wide adjustment span of I
several application benefits. The first benefit relates directly to
the power dissipation of the AD9751, which is proportional to
I
benefit relates to the 20 dB adjustment, which is useful for sys-
tem gain control purposes.
The small signal bandwidth of the reference control amplifier is
approximately 500 kHz and can be used for low frequency, small
signal multiplying applications.
OUTFS
OUTFS
over a 2 mA to 20 mA range by setting I
(refer to the Power Dissipation section). The second
DIV0
CIRCUITRY
DIV1
PLL
PLLLOCK
PLLVDD
CLKVDD
CLK+
CLK–
CLKCOM
RESET
LPF
I
I
REF
OUTA
OUTB
REFIO
is applied to the segmented current
V
DIFF
= V
and an external resistor, R
OUT
50
V
R
OUT
A – V
LOAD
B
OUT
OUTFS
B
50
R
V
OUT
LOAD
REF
OUTFS
as stated in
A
between
REF
provides
REV. C
OUTFS
, is
SET
.
,

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