ADP2102 Analog Devices, ADP2102 Datasheet - Page 14

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ADP2102

Manufacturer Part Number
ADP2102
Description
Low Duty Cycle, 600 mA, 3 MHz Synchronous Step-Down DC-to-DC Converter
Manufacturer
Analog Devices
Datasheet
ADP2102
As a result of this auto mode control technique, losses are
minimized at light loads, improving system efficiency.
The PSM reverse current comparator controls the entry and exit
into forced continuous conduction mode. Some minor jitter is
normal during transition from DCM to CCM with loads at
approximately 100 mA typical, and it has no adverse impact on
regulation.
SYNCHRONOUS RECTIFICATION
In addition to the P-channel MOSFET switch, the ADP2102
includes an integrated N-channel MOSFET synchronous recti-
fier. The synchronous rectifier improves efficiency, especially
at low output voltages, and reduces cost and board space by
eliminating the need for an external rectifier.
CURRENT LIMIT
The current limit circuit employs a valley current sensing scheme.
Current limit detection occurs during the off time through
sensing of the voltage drop across the on resistance of the
synchronous rectifier switch. The detection threshold is 1 A
typical.
Figure 45 illustrates the inductor current waveform during normal
operation and during current limit. The output current, I
is the average of the inductor ripple current waveform. The
low-to-medium load current waveform illustrates the continuous
conduction mode operation with peak and valley inductor
currents below the current limit threshold. When the load
current is increased, the ripple waveform maintains the same
amplitude and frequency because the current falls below the
current limit threshold at the valley of the ripple waveform.
As the current falls below the threshold during the normal off-
time of each cycle, the start of each on-time is not delayed, and
the circuit output voltage is regulated at the correct value.
CURRENT LIMIT
THRESHOLD
INDUCTOR
CURRENT
I
OUT
MEDIUM LOAD
CURRENT
Figure 45. Inductor Current—Current Limit Operation
NORMAL OPERATION
OUT
,
Rev. B | Page 14 of 24
ΔI
When the load current is further increased such that the lower
peak is above the current limit threshold, the off time is lengthened
to allow the current to decrease to this threshold before the next
on-time begins.
Both V
operates in constant current mode. The load current (I
these conditions is equal to the current limit threshold plus half
the ripple current, as shown in Equation 5 and in Figure 44.
The ripple current is calculated using Equation 6.
The ADP2102 also provides a negative current limit to prevent
an excessive reverse inductor current when the switching section
sinks current from the load in forced continuous conduction
mode. Under negative current limit conditions, both the high-
side and low-side switches are disabled.
INDUCTOR
CURRENT
HIGH LOAD
I
ΔI
CURRENT
OCL
OUT
L
=
= I
and the switching frequency are reduced as the circuit
V
VALLEY
OUT
V
DC CURRENT LIMIT = MAX LOAD
IN
×
+ ΔI
(
×
V
Figure 44. Valley Current Limit
f
IN
SW
L
/2
I
PEAK
×
V
VALLEY CURRENT LIMIT
L
OUT
CURRENT LIMIT
I
I
OCL
VALLEY
)
I
OCL
TIME
OCL
) under
ΔI
(5)
(6)

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