ADP2102 Analog Devices, ADP2102 Datasheet - Page 5

• Manufacturer Part Number: ADP2102
• Description: Low Duty Cycle, 600 mA, 3 MHz Synchronous Step-Down DC-to-DC Converter
• Manufacturer: Analog Devices

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
Pin
No.
1
2
3
4
5
6
7
8
Mnemonic
MODE
EN
FB/OUT
AGND
PGND
LX
PVIN
AVIN
Description
Mode Input. To set the ADP2102 to forced continuous conduction mode (CCM), drive MODE high. To set the ADP2102
to power save mode/auto mode (PSM), drive MODE low.
Enable Input. Drive EN high to turn on the ADP2102. Drive EN low to turn it off and reduce the input current to 0.1 μA.
This pin cannot be left floating.
Output Sense Input or Feedback Input. For fixed output versions, OUT is the top of the internal resistive voltage
divider. Connect OUT to the output voltage. For adjustable (no suffix) versions, FB is the input to the error amplifier.
Drive FB through a resistive voltage divider to set the output voltage. The FB regulation threshold is 0.8 V.
Analog Ground. Connect AGND to PGND at a single point as close to the ADP2102 as possible. The exposed paddle is
electrically common with the analog ground pin.
Power Ground.
Switch Output. LX is the drain of the P-channel MOSFET switch and the N-channel synchronous rectifier. Connect the
output LC filter between LX and the output voltage.
Power Source Input. Drive PVIN with a 2.7 V to 5.5 V power source. A ceramic bypass capacitor of 2.2 μF or greater is
required on this pin to the nearest PGND plane.
Power Source Input. AVIN is the supply for the ADP2102 internal circuitry. This pin can be connected in three different ways.
For light-to-medium loads up to 300 mA, the AVIN pin and the PVIN pin can be shorted together.
For noise reduction, place an external RC filter between PVIN and AVIN. The recommended values for the
external RC filter are 10 Ω and 0.1 μF, respectively. This configuration can be used for all loads.
For light-to-heavy loads (greater than 300 mA), bypass the AVIN pin with a 1 pF to 0.01 μF capacitor to the
nearest PGND plane. Do not short the AVIN and PVIN pins when using only a bypass capacitor.
FB/OUT
MODE
AGND
EN
Figure 3. Pin Configuration
1
2
3
4
Rev. B | Page 5 of 24
(Not to Scale)
ADP2102
TOP VIEW
8 AVIN
7 PVIN
6 LX
5 PGND
ADP2102