LMC835N

Manufacturer Part NumberLMC835N
DescriptionIC GRAPHIC EQUALIZER DGTL 28-DIP
ManufacturerNational Semiconductor
TypeEqualizer
LMC835N datasheet
 


Specifications of LMC835N

ApplicationsReceiverMounting TypeThrough Hole
Package / Case*Lead Free Status / RoHS StatusContains lead / RoHS non-compliant
Other names*LMC835N
LMC835
  
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Absolute Maximum Ratings
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage V
V
b
DD
SS
Allowable Input Voltage (Note 1)
Storage Temperature T
b
stg
Lead Temperature (Soldering 10 sec) N Pkg
Lead Temperature V Pkg
Vapor Phase (60 sec)
Infrared (15 sec)
Electrical Characteristics
LOGIC SECTION
Symbol
Parameter
I
Supply Current
DDL
I
SSL
I
DDH
I
SSH
V
High-Level Input Voltage
IH
V
Low-Level Input Voltage
IL
f
Clock Frequency
o
t
Width of STB Input
w(STB)
t
Data Setup Time
setup
t
Data Hold Time
hold
t
Delay from Rising Edge of CLOCK
cs
to STB
I
Input Current
IN
C
Input Capacitance
IN
Note 1 Pins 2 3 and 26 have a maximum input voltage range of
Note 2 Bold numbers apply at temperature extremes All other numbers apply at T
circuit Figures 3 and 4
Note 3 Guaranteed and 100% production tested
Note 4 Guaranteed (but not 100% production tested) over the operating temperature range These limits are not used to calculate outgoing quality levels
Timing Diagram
Note To change the gain of the presently selected band it is not necessary to send DATA 1 (Band Selection) each time
Operating Ratings
Supply Voltage V
DD
Digital Ground (Pin 13)
Digital Input (Pins 14 15 16)
18V
Analog Input (Pins 1 2 3 4 25 26 27)
V
0 3V
b
SS
(Note 1)
to V
0 3V
a
Operating Temperature T
DD
60 C to
150 C
a
260 C
a
215 C
a
220 C
a
(Note 2) V
7 5V V
7 5V A GND
e
eb
e
DD
SS
Test Conditions
Typ
Pins 14 15 16 are 0V
0 01
Pins 14 15 16 are 0V
0 01
Pins 14 15 16 are 5V
1 3
Pins 14 15 16 are 5V
0 9
Pins 14 15 16
1 8
Pins 14 15 16
0 9
Pin 14
2000
See Figure 1
0 25
See Figure 1
0 25
See Figure 1
0 25
See Figure 1
0 25
Pins 14 15 16 0V
V
5V
0 01
k
IN k
g
Pins 14 15 16 f
1 MHz
5
e
22V for the typical application shown in Figure 7
g
25 C V
7 5V V
e
e
eb
A
DD
SS
FIGURE 1
3
V
5V to 16V
b
SS
V
to V
SS
DD
V
to V
SS
DD
V
to V
SS
DD
40 C to
85 C
b
a
opr
0V
Tested
Design
Unit
Limit
Limit
(Limit)
(Note 3)
(Note 4)
0 5
0 5
mA (Max)
0 5
0 5
mA (Max)
5
5
mA (Max)
5
5
mA (Max)
2 3
2 5
V (Min)
0 6
0 4
V (Max)
500
500
kHz (Max)
1
s (Min)
1
1
s (Min)
1
1
1
s (Min)
1
1
s (Min)
1
A (Max)
g
pF
7 5V D GND
A GND
0V as shown in the test
e
e
TL H 6753– 3