LT1016IS8 Linear Technology, LT1016IS8 Datasheet - Page 3

IC COMPARATOR 10NS HI-SPD 8-SOIC

LT1016IS8

Manufacturer Part Number
LT1016IS8
Description
IC COMPARATOR 10NS HI-SPD 8-SOIC
Manufacturer
Linear Technology
Series
UltraFast™r
Type
General Purposer
Datasheet

Specifications of LT1016IS8

Number Of Elements
1
Output Type
CMOS, Complementary, TTL
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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temperature range, otherwise specifications are at T
SYMBOL
V
DV
I
I
CMRR
PSRR
A
V
V
I
I
V
V
I
t
Dt
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Input offset voltage is defined as the average of the two voltages
measured by forcing first one output, then the other to 1.4V. Input offset
current is defined in the same way.
Note 3: Input bias current (I
currents.
Note 4: t
equipment with low values of overdrive. The LT1016 is sample tested with
a 1V step and 500mV overdrive. Correlation tests have shown that t
ELECTRICAL CHARACTERISTICS
OS
B
IL
PD
+
DT
OS
V
OH
OL
IH
IL
PD
OS
PD
and Dt
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Input Voltage Range
Common Mode Rejection
Supply Voltage Rejection
Small-Signal Voltage Gain
Output High Voltage
Output Low Voltage
Positive Supply Current
Negative Supply Current
LATCH Pin Hi Input Voltage
LATCH Pin Lo Input Voltage
LATCH Pin Current
Propagation Delay (Note 4)
Differential Propagation
Delay
Latch Setup Time
PD
cannot be measured in automatic handling
B
) is defined as the average of the two input
CONDITIONS
R
(Note 2)
(Note 3)
(Note 6)
Single 5V Supply
–3.75V £ V
Positive Supply 4.6V £ V
LT1016C
Positive Supply 4.6V £ V
LT1016I
Negative Supply 2V £ V
1V £ V
V
V
DV
DV
(Note 4) DV
OD = 5mV
S
+
LATCH
IN
IN
≥ 4.6V
£ 100W (Note 2)
= 100mV, OD = 5mV
= 100mV, OD = 20mV
OUT
= 0V
A
£ 2V
CM
IN
= 25∞C. V
= 100mV,
£ 3.5V
PD
The
and
+
+
+
I
I
I
I
denotes the specifications which apply over the full operating
£ 7V
OUT
OUT
SINK
SINK
= 5V, V
£ 5.4V
£ 5.4V
=1mA
= 10mA
= 4mA
= 10mA
Dt
are performed to guarantee that all internal bias conditions are correct. For
low overdrive conditions V
propogation delay is defined as: Dt
Note 5: Electrical specifications apply only up to 5.4V.
Note 6: Input voltage range is guaranteed in part by CMRR testing and in
part by design and characterization. See text for discussion of input
voltage range for supplies other than ±5V or 5V.
Note 7: This parameter is guaranteed to meet specified performance
through design and characterization. It has not been tested.
PD
limits shown can be guaranteed with this test if additional DC tests
= 5V, V
OUT
(Q) = 1.4V, V
OS
is added to overdrive. Differential
LATCH
PD
–3.75
1400
1.25
MIN
2.7
2.4
2.0
= t
80
60
54
80
PDLH
= 0V, unless otherwise noted.
LT1016C/I
– t
3000
TYP
100
PDHL
1.0
0.3
0.3
3.4
3.0
0.3
0.4
10
96
75
75
25
4
5
3
9
2
LT1016
MAX
500
3.5
1.0
1.3
3.5
3.5
0.5
0.8
±3
10
13
35
14
16
12
15
5
3
UNITS
mV/∞C
3
V/V
mV
mV
mA
mA
mA
mA
mA
mA
dB
dB
dB
dB
mA
ns
ns
ns
ns
ns
ns
V
V
V
V
V
V
V
V

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