DS80CH11 Maxim, DS80CH11 Datasheet - Page 50

• Manufacturer Part Number: DS80CH11
• Description: The system energy manager is a highly integrated microcontroller that provides several key features for systems including key scanning and control, battery and power management, as well as two 2-Wire serial I/O Ports
• Manufacturer: Maxim

7.8.2
ADCON2; SFR ADDR.=0B3H
Read/Write Access: Unrestricted.
Initialization: 00h on any type of reset
OUTCF – Output Conversion Format.
Selects whether the conversion output most–significant
8–bits or the most–significant 2–bits are presented in
the A/D MSB register. When OUTCF = 1, the MSB reg-
ister returns the upper 2 conversion bits, ADR8 and
ADR9 in bit locations 0 and 1 respectively. When
OUTCF = 0, the MSB register returns the upper 8 bits
with result bit ADR9 located in bit position 7 and result bit
ADR2 in bit position 0.
MUX2–0 – Multiplexor Select.
MUX2–0 select the A/D channel that will be sampled
and converted when the next conversion is initiated.
The table to the right shows the decoding.
7.8.3
ADMSB; SFR ADDR.=0B4H
Read/Write Access: Unrestricted.
Initialization: 00h on any type of reset
Depending on the programming of the OUTCF bit, this
register contains either the most significant 8–bits or
2–bits of the conversion result. If OUTCF = 0 bits 7–0
DS80CH11
011200 50/88
OUTCF
ADR9/
BIT 7
BIT 7
0
ADCON2 – A/D Control Register 2
ADMSB – A/D Result Most Significant Byte
ADR8/
MUX2
BIT 6
BIT 6
0
ADR7/
MUX1
BIT 5
BIT 5
0
ADR6/
MUX0
BIT 4
BIT 4
0
APS3–0 – A/D Clock Prescale Select.
APS3–0 are used to determine the prescale setting from
the micro’s CPU clock to the A/D converter. The CPU
machine clock will be divided by the value of (N+1)
where N is the 4–bit value represented by APS3–0.
contain bits 9–2, respectively, of the result.
OUTCF=1, bits 7–2 contain 0, and bits 1 and 0 contain
result bits 9 and 8, respectively.
ADR5/
APS3
BIT 3
MUX2
BIT 3
0
0
0
0
0
1
1
1
1
MUX1
0
0
1
1
0
0
1
1
ADR4/
APS2
BIT 2
BIT 2
0
MUX0
0
1
0
1
0
1
0
1
PIN
AI0
AI1
AI2
AI3
AI4
AI5
AI6
AI7
ADR3/
ADR9
APS1
BIT 1
BIT 1
A/D CHANNEL
Channel 0
Channel 1
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7
ADR2/
ADR8
BIT 0
APS0
BIT 0
If