TMP86xy44UG Toshiba, TMP86xy44UG Datasheet - Page 94

• Manufacturer Part Number: TMP86xy44UG
• Manufacturer: Toshiba

Specifications of TMP86xy44UG

• Package: QFP44
• Rom Types (m=mask,p=otp,f=flash): M/P
• Rom Size: 60
• Ram Size: 1K
• Driver Led: 19
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: -
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 8
• Da Converter Channels: 1
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 35
• Power Supply (v): 4.5 to 5.5

Example :Sets the timer mode with source clock fc/2
9.3 Function
Table 9-1 Source Clock (Internal clock) for Timer/Counter2 (at fc = 16 MHz, DV7CK=0)
TC2C
000
001
010
011
100
101
9.3.1 Timer mode
K
NORMAL2, the timer/counter2 can generate warm-up time until the oscillator is stable.
The timer/counter 2 has three operating modes: timer, event counter and window modes.
And if fc or fs is selected as the source clock in timer mode, when switching the timer mode from SLOW1 to
tents of up counter. If a match is found, a timer/counter 2 interrupt (INTTC2) is generated, and the counter is
cleared. Counting up is resumed after the counter is cleared.
interrupt by matching upper 5-bits only. Though, in this situation, it is necessary to set TC2DRH only.
524.29 [ms]
Resolution
512.0 [ms]
30.52 [ms]
16.0 [ms]
In this mode, the internal clock is used for counting up. The contents of TC2DR are compared with the con-
When fc is selected for source clock at SLOW2 mode, lower 11-bits of TC2DR are ignored and generated a
Note:When fc is selected as the source clock in timer mode, it is used at warm-up for switching from SLOW1 mode
0.5 [ms]
–
to NORMAL2 mode.
DV7CK = 0
Maximum Time Set-
LDW
DI
SET
EI
LD
LD
32.77 [ms]
33.55 [s]
9.54 [h]
1.05 [s]
NORMAL1/2, IDLE1/2 mode
2 [s]
ting
–
(TC2DR), 061AH
(EIRH). 5
(TC2CR), 00001000B
(TC2CR), 00101000B
Resolution
30.52 [ms]
0.98 [ms]
16.0 [ms]
3
0.5 [ms]
[Hz] and generates an interrupt every 25 ms (at fc = 16 MHz )
1 [s]
–
Page 83
DV7CK = 1
; Sets TC2DR (25 ms ³ 2
; Enables INTTC2 interrupt
; IMF= “1”
; Source clock / mode select
; Starts Timer
; IMF= “0”
Maximum Time Set-
32.77 [ms]
1.07 [min]
18.2 [h]
1.05 [s]
2 [s]
ting
–
8
0.98 [ms]
62.5 [ns]
/fc = 061AH)
Resolu-
SLOW1/2 mode
1 [s]
tion
–
–
–
18.2 [h]
Setting
Maxi-
mum
Time
[min]
1.07
–
–
–
–
0.98 [ms]
TMP86CS44UG
Resolu-
SLEEP1/2 mode
1 [s]
tion
–
–
–
–
18.2 [h]
Setting
Maxi-
mum
Time
[min]
1.07
–
–
–
–