TMP86xy46NG Toshiba, TMP86xy46NG Datasheet - Page 60

• Manufacturer Part Number: TMP86xy46NG
• Manufacturer: Toshiba

Specifications of TMP86xy46NG

• Package: SDIP42
• Rom Types (m=mask,p=otp,f=flash): M/P/F
• Rom Size: 8/16/32
• Ram Size: 512/512/1K
• Driver Led: 19
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: -
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 8
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 1
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 33
• Power Supply (v): 4.5 to 5.5

5.2 Port P1 (P15 to P10)
P1CR
(000DH)
(0001H)
control. Input/output mode is specified by the corresponding bit in the port P1 input/output control register (P1CR).
Port P1 is configured as an input if its corresponding P1CR bit is cleared to “0”, and as an output if its corresponding
P1CR bit is set to “1”.
“0”.
an input port, an external interrupt input or a timer/counter input, the corresponding bit of P1CR is cleared to “0”.
and beforehand the corresponding output latch should be set to “1”. Data can be written into the output latch regard-
less of P1CR contents, therefore initial output data should be written into the output latch before setting P1CR.
P1DR
R/W
Port P1 is an 6-bit input/output port which can be configured as an input or an output in one-bit unit under software
During reset, the P1CR is initialized to “0” and port P1 is input mode. The P1 output latches are also initialized to
Port P1 is also used as an external interrupt input, a timer/counter input/output, and a divider output. When used as
When used as an output port, a timer/counter output or divider output, the corresponding bit of P1CR is set to “1”
Note 1: Bit 7 and 6 in P1DR and P1CR are always read as undefined value.
Note 2: Please set the bit 7 and 6 of P1CR to “1” in an emulator.
Note 3: Ports set to the input mode read the pin states. Ports set to the output mode read the output latch. When input pin and out-
put pin exist in port P1 together, the contents of the output latch which is specified as an input mode may be rewritten by
executing the bit manipulation instructions.
Control output
Control input
P1CRi input
P1CR
7
7
Data output
Data input
OUTEN
P1CRi
STOP
6
6
I/O port for P1 port
(specified for each bit)
INT3
P15
5
5
Output latch
Output latch
D
D
P14
PPG
Q
Q
4
4
Figure 5-3 Port P1
DVO
P13
0: Input mode
1: Output mode
3
3
Page 49
INT2
P12
TC1
2
2
INT1
P11
1
1
PWM3
PDO3
TC3
P10
0
0
(Initial value: **00 0000)
(Initial value: **00 0000)
P1i
Note: i = 5
to
TMP86PM46NG
0
R/W