74VCX16245MTD Fairchild Semiconductor, 74VCX16245MTD Datasheet

74VCX16245MTD

Manufacturer Part Number

74VCX16245MTD

Description

IC TXRX BIDIRECT 16B LV 48TSSOP

Manufacturer

Fairchild Semiconductor

Series

74VCXr

Datasheet

1.74VCX16245MTDX.pdf (9 pages)

Specifications of 74VCX16245MTD

Logic Type

Transceiver, Non-Inverting

Number Of Elements

Number Of Bits Per Element

Current - Output High, Low

24mA, 24mA

Voltage - Supply

1.2 V ~ 3.6 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

48-TSSOP

Logic Family

VCX

Operating Supply Voltage (typ)

1.8/2.5/3.3V

Propagation Delay Time

46.5ns

Number Of Elements

Number Of Channels

Input Logic Level

CMOS

Output Logic Level

CMOS

Output Type

3-State

Package Type

TSSOP W

Polarity

Non-Inverting

Logical Function

Bus Transceiver

Operating Supply Voltage (min)

1.2V

Operating Supply Voltage (max)

3.6V

Technology

CMOS

Operating Temp Range

-40C to 85C

Operating Temperature Classification

Industrial

Mounting

Surface Mount

Pin Count

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Meier Automation Equipment Co., Limited

Part Number:

74VCX16245MTDX

Manufacturer:

FAIRCHILD/仙童

Quantity:

20 000

Company:

H&T Electronics

Part Number:

74VCX16245MTDX

Quantity:

2 000

Current page: 1 of 9
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74VCX16245G

(Note 2)(Note 3)

74VCX16245MTD

(Note 3)

74VCX16245

Low Voltage 16-Bit Bidirectional Transceiver

with 3.6V Tolerant Inputs and Outputs

General Description

The VCX16245 contains sixteen non-inverting bidirectional

buffers with 3-STATE outputs and is intended for bus ori-

ented applications. The device is byte controlled. Each

byte has separate 3-STATE control inputs which can be

shorted together for full 16-bit operation. The T/R inputs

determine the direction of data flow through the device.

The OE inputs disable both the A and B ports by placing

them in a high impedance state.

The 74VCX16245 is designed for low voltage (1.2V to

3.6V) V

The 74VCX16245 is fabricated with an advanced CMOS

technology to achieve high speed operation while maintain-

ing low CMOS power dissipation.

Ordering Code:

Note 2: Ordering code “G” indicates Trays.

Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Order Number

applications with I/O compatibility up to 3.6V.

Package Number

BGA54A

MTD48

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

DS012169

Features

Note 1: To ensure the high-impedance state during power up or power

down, OE should be tied to V

value of the resistor is determined by the current-sourcing capability of the

driver.

1.2V to 3.6V V

3.6V tolerant inputs and outputs

Power-off high impedance inputs and outputs

Supports live insertion/withdrawal (Note 1)

Static Drive (I

Uses patented noise/EMI reduction circuitry

Latchup performance exceeds 300 mA

ESD performance:

Also packaged in plastic Fine-Pitch Ball Grid Array

(FBGA)

2.5 ns max for 3.0V to 3.6V V

Human body model

Machine model

24 mA @ 3.0V V

Package Description

supply operation

200V

)

2000V

through a pull-up resistor; the minimum

October 1996

Revised June 2005

www.fairchildsemi.com

Related parts for 74VCX16245MTD

74VCX16245MTD Summary of contents

Page 1

... Package Number 74VCX16245G BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 2)(Note 3) 74VCX16245MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Note 3) Note 2: Ordering code “G” indicates Trays. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Connection Diagrams Pin Assignment of TSSOP Pin Assignment for FBGA (Top Thru View) Logic Diagram www.fairchildsemi.com Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW) n T/R Transmit/Receive Input n A –A Side A Inputs or 3-STATE Outputs ...

Page 3

Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( Outputs 3-STATE Outputs Active (Note 5) 0 Input Diode Current ( ...

Page 4

DC Electrical Characteristics Symbol Parameter V LOW Level Output Voltage OL I Input Leakage Current I I 3-STATE Output Leakage OZ I Power Off Leakage Current OFF I Quiescent Supply Current Increase in I per Input CC ...

Page 5

Dynamic Switching Characteristics Symbol Parameter V Quiet Output Dynamic Peak V OLP OL V Quiet Output Dynamic Valley V OLV OL V Quiet Output Dynamic Valley V OHV OH Capacitance Symbol Parameter C Input Capacitance IN C Output Capacitance I/O ...

Page 6

AC Loading and Waveforms (V TEST PLH PHL PZL PLZ PZH PHZ FIGURE 2. Waveform for Inverting and Non-inverting Functions FIGURE 3. 3-STATE Output High Enable and Disable Times for Low ...

Page 7

AC Loading and Waveforms (V TEST PLH PZL FIGURE 6. Waveform for Inverting and Non-Inverting Functions FIGURE 7. 3-STATE Output High Enable and Disable Times for Low Voltage Logic FIGURE 8. 3-STATE Output Low ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide www.fairchildsemi.com Package Number BGA54A 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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