M25P10-A Numonyx, B.V., M25P10-A Datasheet - Page 23

• Manufacturer Part Number: M25P10-A
• Description: 1 Mbit, serial Flash memory, 50 MHz SPI bus interface
• Manufacturer: Numonyx, B.V.

M25P10-A
Regardless of the order of the two events, the Hardware Protected mode (HPM) can be
entered:
●
●
The only way to exit the Hardware Protected mode (HPM) once entered is to pull Write
Protect (W) High.
If Write Protect (W) is permanently tied High, the Hardware Protected mode (HPM) can
never be activated, and only the Software Protected mode (SPM), using the Block Protect
(BP1, BP0) bits of the Status Register, can be used.
Figure 11. Write Status Register (WRSR) instruction sequence
Table 7.
1. As defined by the values in the Block Protect (BP1, BP0) bits of the Status Register, as shown in
signal
W
1
0
1
0
by setting the Status Register Write Disable (SRWD) bit after driving Write Protect (W)
Low
or by driving Write Protect (W) Low after setting the Status Register Write Disable
(SRWD) bit.
SRWD
bit
0
0
1
1
S
C
D
Q
Protection modes
Hardware
protected
protected
Software
(SPM)
(HPM)
Mode
0
Status Register is writable (if
the WREN instruction has set
the WEL bit)
The values in the SRWD, BP1
and BP0 bits can be changed
Status Register is hardware
write protected
The values in the SRWD, BP1
and BP0 bits cannot be
changed
1
High Impedance
Write protection of the
2
Instruction
Status Register
3
4
5
6
7
MSB
7
8
6
9 10 11 12 13 14 15
5
Register In
Protected against
Page Program,
Sector Erase and
Bulk Erase
Protected against
Page Program,
Sector Erase and
Bulk Erase
Protected area
4
Status
3
2
Memory content
1
0
(1)
AI02282D
Ready to accept
Page Program
and Sector Erase
instructions
Ready to accept
Page Program
and Sector Erase
instructions
Unprotected
Instructions
area
Table
(1)
2.
23/51