CD2401 Intel, CD2401 Datasheet - Page 17

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CD2401

Manufacturer Part Number
CD2401
Description
Multi-protocol Communications Controller
Manufacturer
Intel
Datasheet
Datasheet
Table 1. Pin Descriptions (Sheet 1 of 4)
DTACK*
SIZ[0–1]
IACKIN*
Symbol
R/W*
CS*
AS*
DS*
Number
3, 4
Pin
14
15
13
16
17
1
I/O (OD)
I/O (TS)
I/O (TS)
I/O (TS)
I/O (TS)
Type
I
I
CHIP SELECT*: When low, the CD2401 registers can be read or written by the
host processor.
ADDRESS STROBE*: When the CD2401 is a bus master, this pin is an output
which indicates that R/W*, A[7:0], and the externally latched A[31:8] are valid.
DATA STROBE*: When the CD2401 is not a bus master, this is an input used to
strobe data into registers during write cycles and enable data onto the bus
during read cycles. When the CD2401 is a bus master, DS* is an output used to
control data transfer to and from system memory.
READ/WRITE*: When the CD2401 is not a bus master, this pin is an input
which determines if a read or write operation is required when the CS* and DS*
signals are active. When the CD2401 is a bus master, R/W* is an output and
indicates whether a read from or a write to system memory is being performed.
DATA TRANSFER ACKNOWLEDGE*: When the CD2401 is not a bus master,
this is an output and indicates to the host when a read or write to the CD2401 is
complete. When BR* is driven low by the CD2401, DTACK* is an input which
indicates that the system bus is no longer in use. When the CD2401 is a bus
master, DTACK* is an input which indicates when system memory read and
write cycles are complete.
SIZE [0–1]: When not the active bus master, these are inputs that determine the
size of the operand being read or written by the host.
When the CD2401 is a bus master, this is an output determining the size of the
operand being transferred to or from system memory.
INTERRUPT ACKNOWLEDGE IN*: This input, qualified with DS* and A[0–6],
acknowledges CD2401 interrupts.
1.The CD2401 drives DTACK* even though the device does
2.See BYTESWAP description.
1.See BYTESWAP description.
Multi-Protocol Communications Controller — CD2401
not respond to such byte alignment.
SIZ1
SIZ1
0
0
1
1
0
1
Bit
Bit
SIZ0
SIZ0
0
1
0
1
1
0
Description
3 bytes
32 Bit
Byte
16 bit
Size
16 bit
Byte
Size
2
1
1
1
17

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