A45L9332A Series AMIC Technology, Corp., A45L9332A Series Datasheet - Page 33

• Manufacturer Part Number: A45L9332A Series
• Description: 256K x 32 Bit x 2 Banks Synchronous Graphic RAM
• Manufacturer: AMIC Technology, Corp.

CLOCK
PRELIMINARY
Page Read & Write Cycle at Same Bank @Burst Length=4
ADDR
(CL=2)
(CL=3)
CKE
RAS
CAS
DQM
A10
DSF
CS
DQ
DQ
WE
A9
*Note : 1. To write data before burst read ends, DQM should be asserted three cycle prior to write
0
Row Active
(A-Bank)
Ra
Ra
1
2. Row precharge will interrupt writing. Last data input, t
3. DQM should mask invalid input data on precharge command cycle when asserting precharge
command to avoid bus contention.
before end of burst. Input data after Row precharge cycle will be masked internally.
(October, 2001, Version 0.1)
2
t
RCD
3
(A-Bank)
Ca0
Read
4
5
(A-Bank)
Read
Cb0
Qa0
6
Qa1
Qa0
7
Qb0
Qa1
*Note 2
8
*Note1
Qb0
Qb1
9
32
High
RDL
10
(A-Bank)
before Row precharge, will be written.
Write
Dc0
Dc0
Cc0
11
Dc1
Dc1
12
t
CDL
(A-Bank)
Dd0
Dd0
Write
Cd0
13
Dd1
Dd1
14
*Note3
AMIC Technology, Inc.
t
RDL
A45L9332A Series
15
Precharge
(A-Bank)
16
*Note 2
17
: Don't care
18
19