WM8501 Wolfson Microelectronics plc, WM8501 Datasheet - Page 13

• Manufacturer Part Number: WM8501
• Description: 24-bit 192khz Stereo Dac With 1.7vrms Line Driver
• Manufacturer: Wolfson Microelectronics plc

Production Data
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HIGH PERFORMANCE MODE
On the rising edge of ENABLE, the DEEMPH pin is sampled. If it is low the device powers up
normally. If it is high the device goes into a high performance and high power consumption state.
Once ENABLE is high, DEEMPH controls the selection of the de-emphasis filter.
INPUT AUDIO FORMAT SELECTION
FORMAT (pin 13) controls the data input format.
Table 2 Input Audio Format Selection
Notes:
INPUT DSP FORMAT SELECTION
Table 3 DSP Interface Formats
DE-EMPHASIS CONTROL
DEEMPH (pin 12) is an input control for selection of de-emphasis filtering to be applied.
Table 4 De-emphasis Control
1.
2.
FORMAT
In 16-24 bit I
high for a minimum of data width BCLKs and low for a minimum of data width BCLKs,
unless Note 2. For data widths greater than 24 bits, the LSB’s will be truncated and the
most significant 24 bits will be used by the internal processing.
If exactly 16 BCLK cycles occur in both the low and high period of LRCLK the WM8501 will
assume the data is 16-bit and accept the data accordingly.
0
1
FORMAT
DEEMPH
0
1
0
1
2
S mode, any data from 16-24 bits or more is supported provided that LRCLK is
50% LRCLK DUTY CYCLE
16 bit
(MSB-first, right justified)
I
(Philips serial data protocol)
2
S format up to 24 bit
INPUT DATA MODE
16 bit right justified
DE-EMPHASIS
16–24 bit I
Off
On
2
S
LRCLK of 4 BCLK or Less Duration
DSP format –mode B
DSP format –mode A
PD, Rev 4.2, July 2009
WM8501
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