MPC8248 Freescale Semiconductor, Inc, MPC8248 Datasheet - Page 19
MPC8248
Manufacturer Part Number
MPC8248
Description
Mpc8248 Powerquicc Ii Integrated Communications Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MPC8248.pdf
(60 pages)
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Figure 8
6.2
Table 11
Freescale Semiconductor
PIO/IDMA/TIMER[TGATE assertion] input signals
shows PIO and timer signals.
lists SIU input characteristics.
SIU AC Characteristics
TIMER input signal [TGATE deassertion]
TIMER(sp42/43)/ PIO(sp42a/sp43a)
The CLKIN input to the MPC8272 should not exceed +/– 150 psec. This
represents total input jitter—the combination of short term (peak-to-peak)
and long term (cumulative). The duty cycle of CLKIN should not exceed the
ratio of 40:60.
Spread spectrum clocking is allowed with 1% input frequency down-spread
at maximum 60 KHz modulation rate regardless of input frequency.
The MPC8272 meets the timing requirements of PCI Specification Revision
2.2. Refer to
(Output Hold)” to determine if a specific clock configuration is compliant.
Note: TGATE is asserted on the rising edge of the clock; it is deasserted on the falling edge.
MPC8272 PowerQUICC II™ Family Hardware Specifications, Rev. 1.5
IDMA output signals
Section 7, “Clock Configuration
output signals
Figure 8. PIO and Timer Signal Diagram
NOTE: CLKIN Jitter and Duty Cycle
NOTE: Spread Spectrum Clocking
(See note)
(See note)
Sys clk
NOTE: PCI AC Timing
sp22
Modes” and “Note: Tval
sp22
sp42/sp43
sp23
AC Electrical Characteristics
sp42a/sp43a
sp42/sp43
sp23
19