ST7586S Sitronix Technology Corporation, ST7586S Datasheet

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ST7586S

Manufacturer Part Number
ST7586S
Description
4-level Gray Scale Dot Matrix Lcd Controller/driver
Manufacturer
Sitronix Technology Corporation
Datasheet
Sitronix
INTRODUCTION
ST7586S is a driver & controller LSI for 4-level gray scale graphic dot-matrix liquid crystal display systems. It contains
384-segment and 160-common driver circuits. This chip can be connected directly to a microprocessor which accepts 8-bit
parallel interface (8080-series or 6800-series type), 4-Line serial interface or 3-Line serial interface. Display data is stored
into an on-chip Display Data RAM (DDRAM). It performs the Display Data RAM read/write operation without external
operating clock, and the power consumption can be minimized. In addition, since all necessary power supply circuits for LCD
system are built-in, ST7586S constructs a LCD display system with the fewest components.
FEATURES
Single-chip LCD controller/driver
Driver Output Circuits
On-chip Display Data RAM
Various Partial Display Features
Microprocessor Interface
On-chip Low Power Analog Circuit
Ver-1.1b
ST7586S
384 segment outputs / 160 common outputs
Capacity: 384 x 160 x 2 = 122,880 bits
Applicable partial duty
Partial window moving & data scrolling
8-bit parallel bi-directional interface supports
6800-series or 8080-series MPU
4-Line serial interface
3-Line (9-bit) serial interface
Sitronix Technology Corp. reserves the right to change the contents in this document without prior notice.
6800, 8080, 4-Line & 3-Line Interface
4-Level Gray Scale Dot Matrix LCD Controller/Driver
1/63
Operating Voltage Range
Built-in OTP−ROM for LCD Vop Optimization
Package Type: COG
On-chip oscillator circuit
Voltage booster with built-in boost-capacitors
Extremely few external components: 4 capacitors
Built-in voltage regulator with programmable contrast
Built-in voltage follower supports LCD bias voltage
Available bias: 1/9 ~ 1/14
Digital Power (VDD1): 1.8V ~ 3.3V (TYP.)
Analog Power (VDD2~VDD5, VDDX):
2.8V ~ 3.3V (TYP.)
LCD operation voltage (Vop = V0-XV0) : 18V
ST
ST7586S
2009/12/23

Related parts for ST7586S

ST7586S Summary of contents

Page 1

... Sitronix INTRODUCTION ST7586S is a driver & controller LSI for 4-level gray scale graphic dot-matrix liquid crystal display systems. It contains 384-segment and 160-common driver circuits. This chip can be connected directly to a microprocessor which accepts 8-bit parallel interface (8080-series or 6800-series type), 4-Line serial interface or 3-Line serial interface. Display data is stored into an on-chip Display Data RAM (DDRAM) ...

Page 2

... ST7586S PAD ARRANGEMENT Unit : um Unit : um Ver-1.1b Part Number ST7586S-G4 Chip Thickness 300 Bump 10, 11, 31 29, 30, 37, 38 1~7, 9, 12~28, 32~36, 40~134 135~153, 660~678 154~659 * Refer to “PAD CENTER COORDINATES” for ITO layout 2/63 Unit: um Chip Size 11434 x 701 Bump Height 15 Bump Size 105 x 63 ...

Page 3

... ST7586S PAD CENTER COORDINATES PAD NAME 1 VSS1 -5300 2 VPP -5220 3 VPP -5140 4 VPP -5060 5 VPP -4980 6 CL -4900 7 CLS -4820 8 VDD1 -4760 9 VD1S -4700 10 A0 -4600 11 RWR -4480 12 D0 -4380 13 DUMMY -4300 14 D1 -4220 15 D2 -4140 16 D3 -4060 17 D4 -3980 18 D5 ...

Page 4

... ST7586S PAD NAME 93 VDD2 2020 94 VDD2 2100 95 VDD2 2180 96 VDD2 2260 97 VDD2 2340 98 VDD2 2420 99 VDD2 2500 100 VDD2 2580 101 VDD2 2660 102 VDD2 2740 103 VM 2820 104 VM 2900 105 VM 2980 106 VM 3060 107 VM 3140 108 VM 3220 109 VM 3300 110 ...

Page 5

... ST7586S PAD NAME 189 COM109 4879.33 190 COM111 4857.33 191 COM113 4835.33 192 COM115 4813.33 193 COM117 4791.33 194 COM119 4769.33 195 COM121 4747.33 196 COM123 4725.33 197 COM125 4703.33 198 COM127 4681.33 199 COM129 4659.33 200 COM131 4637.33 201 COM133 4615 ...

Page 6

... ST7586S PAD NAME 285 SEG70 2673 286 SEG71 2651 287 SEG72 2629 288 SEG73 2607 289 SEG74 2585 290 SEG75 2563 291 SEG76 2541 292 SEG77 2519 293 SEG78 2497 294 SEG79 2475 295 SEG80 2453 296 SEG81 2431 297 SEG82 ...

Page 7

... ST7586S PAD NAME 381 SEG166 561 382 SEG167 539 383 SEG168 517 384 SEG169 495 385 SEG170 473 386 SEG171 451 387 SEG172 429 388 SEG173 407 389 SEG174 385 390 SEG175 363 391 SEG176 341 392 SEG177 319 393 SEG178 ...

Page 8

... ST7586S PAD NAME 477 SEG262 -1551 478 SEG263 -1573 479 SEG264 -1595 480 SEG265 -1617 481 SEG266 -1639 482 SEG267 -1661 483 SEG268 -1683 484 SEG269 -1705 485 SEG270 -1727 486 SEG271 -1749 487 SEG272 -1771 488 SEG273 -1793 489 SEG274 ...

Page 9

... ST7586S PAD NAME 573 SEG358 -3663 574 SEG359 -3685 575 SEG360 -3707 576 SEG361 -3729 577 SEG362 -3751 578 SEG363 -3773 579 SEG364 -3795 580 SEG365 -3817 581 SEG366 -3839 582 SEG367 -3861 583 SEG368 -3883 584 SEG369 -3905 585 SEG370 ...

Page 10

... ST7586S PAD NAME 669 COM18 -5606.5 670 COM16 -5606.5 671 COM14 -5606.5 672 COM12 -5606.5 673 COM10 -5606.5 674 COM8 -5606.5 675 COM6 -5606.5 676 COM4 -5606.5 677 COM2 -5606.5 678 COM0 -5606.5 Ver-1. -86.5 -108.5 -130.5 -152.5 -174.5 -196.5 -218.5 -240 ...

Page 11

... ST7586S BLOCK DIAGRAM Ver-1.1b 11/63 2009/12/23 ...

Page 12

... ST7586S PIN DESCRIPTION Power System Name Type VDD1 Power VDD1 is the power of interface I/O circuit. VDD2 is the analog power for internal booster. VDD3~5 are the analog power for LCD driver. VDD2~5 Power VDD2~5 and VDDX are separated in ITO and connected together by FPC or PCB. ...

Page 13

... ST7586S LCD Driver Outputs Name Type LCD SEG-driver outputs. The display data and the polar-signal (M) control the output voltage of SEG-driver. Display Data SEG0 H to Output H SEG383 L L Display OFF, Sleep-In mode LCD COM-driver outputs. The internal scanning data and the polar-signal (M) control the output voltage of COM-driver. ...

Page 14

... ST7586S Name Type Read / Write execution control pin. (This pin is only used in parallel interface) MPU Type 6800-series ERD Input 8080-series This pin is not used in serial interfaces and should be connected to VDD1. The bi-directional data bus of the MPU interface. When CSB is “H”, they are high impedance. ...

Page 15

... ST7586S ITO Resistance Limitation VDDX, VDD1~VDD5, VSSX, VSS1, VSS2, VSS4, V0I, V0O, V0S, XV0I, XV0O, XV0S, VM VPP, VGI, VGO, VGS A0, ERD, RWR, CSB, D[7:0], (SDA), (SCL), TE RSTB IF[3:1], CLS, EXTB TCAP, CL, VREF Note: 1. Make sure that the ITO resistance of COM0 ~ COM159 is equal, and SEG0 ~ SEG383. ...

Page 16

... Chip Select Input CSB pin is used for chip selection. ST7586S can interface with an MPU when CSB is "L". If CSB is “H”, the inputs of A0, ERD and RWR with any combination will be ignored and D[7:0] are high impedance. In 3-Line and 4-Line serial interfaces, the internal shift register and serial counter are reset when CSB is “ ...

Page 17

... ST7586S In 3-Line interface, A0 signal is not available and the 1 Fig. 2 Ver-1.1b st output of SDA will be treated as A0 flag (refer to Fig. 2). Write-Operation of 4-Line Serial Interface 17/63 2009/12/23 ...

Page 18

... ST7586S containing a 384x160x2 bit static RAM stores the display data. The display data RAM (DDRAM) stores the pixel data of the LCD. The built-in DDRAM is an addressable memory array with 384 columns by 160 rows. ST7586S provides two kinds of display modes (monochrome mode and 4-level gray scale mode) and a fast-addressing mode for fast updating display data. Each column address represents 3 sub-columns. For example, setting the column address to “ ...

Page 19

... ST7586S Ver-1.1b Fig. 4 DDRAM Mapping (Monochrome Mode) Fig. 5 DDRAM Format 19/63 2009/12/23 ...

Page 20

... ST7586S Addressing In order to allow MCU accessing display data continuously, the address counter is automatically increasing by one (+1) after accessing each byte of display data (i.e. “White Display Data” in all interface or “Read Display Data” in parallel interface). The locations of RAM are addressed by the address pointers (XS, XE, YS and YE). The address ranges are X=0~127 (column address) and Y=0~159 (row address). Addresses outside these range is not allowed. Before writing to DDRAM, a “ ...

Page 21

... ST7586S LCD Display Function DDRAM Map to LCD Driver Output The internal relation between DDRAM and LCD driver circuit (SEG/COM output path) with different setting is illustrated below. Row Address Ver-1.1b Column Address Fig. 6 DDRAM Display Direction 21/63 COM PAD 2009/12/23 ...

Page 22

... ST7586S Line Address Circuit This circuit assigns DDRAM a Line Address corresponding to the first line (setting by instruction of First Output COM) of display. Therefore, by setting Line Address repeatedly, ST7586S is possible to realize the screen scrolling without changing the content of DDRAM as shown in Fig. 7. Row Address Ver-1.1b Column Address Fig ...

Page 23

... ST7586S Partial Display This function is defining the visible display area as illustrated in Fig. 8. The different partial display area setting will be changing frame rate or Vop to avoid abnormal display. The recommended range of partial display area setting is defined from 64 duty to 160 duty. The partial display setting is combining the instructions of Partial Display and Partial Display Area. ...

Page 24

... The built-in power circuits generate the voltage levels which are necessary to drive the liquid crystal. It consumes low power with the fewest external component. The built-in power system has voltage booster, voltage regulator and voltage follower circuits. Before power ST7586S is OFF, a Power OFF procedure is needed. Please refer to the OPERATION FLOW section. External Component of Power Circuit The recommended external power components need only three capacitors ...

Page 25

... ST7586S Temperature Gradient Selection Circuit SET V0 with temperature compensation (Temperature ≠ 24° C) There are 16-line slopes in each temperature step, and customer can select one line slope of temperature compensation coefficient for each temperature step. Each temperature step is 8° C. Please see Fig below. ...

Page 26

... ST7586S Note: Please make sure to avoid any kind of heating source near ST7586S such as back light, to prevent Vop is not anticipative because of temperature compensation circuit is working. Ver-1.1b Fig. 12 Temperature Gradient Compensation 26/63 2009/12/23 ...

Page 27

... Frequency Temperature Gradient Compensation Coefficient Register Loading Detection ST7586S will auto-switch frame rate in different temperature such as Fig. 13. TA, TB and TC are frame rate switching temperature which can be defined by customer with instruction Temperature Range. FRA, FRB, FRC and FRD are switched frame rate which also can be defined by customer with instruction Frame Rate. The frame rate range is from 18.75Hz to 170Hz ...

Page 28

... ST7586S RESET CIRCUIT Setting RSTB pin to “L” (hardware reset) or instruction RESET (software reset) can initialize internal function. Please note the hardware reset is not same as the software reset. Generally, VDD1 is not stable at the time that the system power is just turned ON. The hardware reset is required to initialize internal registers after VDD1 is stable. Initialization by RSTB pin is essential before operating ...

Page 29

... ST7586S INSTRUCTION TABLE INSTRUCTION A0 R/W NOP 0 0 RESET 0 0 Power Save 0 0 Partial Mode 0 0 Inverse Display 0 0 All Pixel ON/OFF 0 0 Display ON/OFF Set Column Address Set Row Address Write Display Data ...

Page 30

... ST7586S INSTRUCTION A0 R/W Display Mode Enable DDRAM Interface Display Duty First Output COM FOSC Divider Partial Display N-Line Inversion 1 0 Read Modify Write Set Vop Vop Increase ...

Page 31

... ST7586S INSTRUCTION A0 R Frame Rate 1 0 (Gray Scale Mode Frame Rate 1 0 (Monochrome Mode Temperature Range Temperature Gradient 1 0 Compensation Ver-1.1b COMMAND BYTE ...

Page 32

... All Pixel ON/OFF When ST7586S enters all pixels on or off mode, all display pixels are turned on or off regardless of the content of DDRAM. The content of DDRAM is not changed by setting All Pixel ON/OFF. After execute the instruction of Partial Mode, the display mode will exit all pixel on/off mode then enter normal mode. ...

Page 33

... D6 Read Display Data The instruction is used to transfer data from DDRAM to MCU without changing status of ST7586S. The column address and row address will be reset to staring column address (XS) and starting row address (YS) when this instruction is accepted. The pre-instruction is defined to enter read DDRAM mode. The following continuously data means content of DDRAM without pre-instruction ...

Page 34

... ST7586S Partial Display Area This instruction defines the display area of partial mode. There are four parameters associated with this instruction, the Partial Display Address Start PTS[15..0] and the Partial Display Address End as illustrated in Fig. 8. The instruction of Partial Display must be executed before setting the instruction of Partial Display Area ...

Page 35

... ST7586S Display Mode This instruction defines the display mode is 4-level gray scale mode or monochrome mode Enable DDRAM Interface This instruction is used to initial DDRAM interface for write data to DDRAM or read data from DDRAM Display Duty This instruction defines display duty ...

Page 36

... ST7586S FOSC Divider This instruction is used to specify the FOSC dividing A0 R FOD1 FOD0 FOSC Dividing Ratio 0 0 Not Divide Divisions Divisions Divisions Partial Display This instruction is used to set the partial display. The instruction of Partial Display must be executed before setting the instruction of Partial Display Area ...

Page 37

... ST7586S Read Modify Write This instruction is used to enter/exit read modify write mode. When entering read modify write, the display data read will not increase column address. Only the display data write operation will increase the column address. This mode is maintained until Disable Read Modify Write (B9h) is accepted. ...

Page 38

... ST7586S Set Vop This instruction is used to adjust the optimum LCD supply voltage Vop. The calculation of Vop is as shown blow: V0=3.6+(Vop[8:0]+VOF[6:0]+VopIncStep-VopDecStep)x0. Vop7 Vop6 The suggestion of usable V0 voltage is shown below (assume VOF[6:0]=0, VopIncStep/VopDecStep=0): Vop8 Vop7 Vop6 ...

Page 39

... ST7586S BIAS System This instruction is used to select LCD bias ratio of the voltage to meet the requirement of driving the LCD BS2 BS1 BS0 BIAS Ratio 1/9 Booster Level This instruction is used to control the built-in booster circuit to provide the power source of the built-in regulator. ...

Page 40

... ST7586S Vop Offset This instruction is used to adjust Vop offset for V0 VOF6 VOF6 VOF5 VOF4 VOF3 Analog Control This instruction is used to set status of analog circuit. ...

Page 41

... ST7586S OTP Write This instruction is used to trigger OTP programming procedure OTP Read This instruction is used to trigger OTP up-load procedure OTP Selection Control This instruction is used to define OTP selection control Ctrl OTP Programming Setting This instruction is used to set OTP write timing ...

Page 42

... ST7586S Frame Rate (Gray Scale Mode) When enter 4-level gray scale mode, this instruction is used to define frequency of frame rate in different temperature range as shown in Fig R FRx4 FRx3 FRx2 FRx1 ...

Page 43

... ST7586S Frame Rate (Monochrome Mode) When enter monochrome mode, this instruction is used to define frequency of frame rate in different temperature range as shown in Fig R FRx4 FRx3 FRx2 FRx1 ...

Page 44

... ST7586S Temperature Gradient Compensation This instruction is used to define the temperature gradient compensation coefficient. The temperature gradient compensation coefficient setting is shown as below table MT13 MT12 1 0 MT33 MT32 1 0 MT53 MT52 1 0 MT73 MT72 1 0 MT93 MT92 1 0 MTB3 ...

Page 45

... ST7586S OPERATION FLOW Power ON Referential Operation Flow Note 1. Please refer to the specification of tRW and tR. 2. Refer to the section of RESET CIRCUIT. 3. The detail instruction functionality is described in section of INSTRUCTION DESCRIPTION. 4. The power stable is defined as the time that the later power (VDDI or VDDA) reaches 90% od its rated voltage ...

Page 46

... ST7586S Item Symbol VDD2 power ON delay t ON-V2 RESB input time t ON-RES CSB input time t ON-CS Note the contents of internal registers are the same as default, the related commands can be ignored RESB is held high or unstable during power ON, a successful hardware reset by RSTB is required after VDDI and VDDA are both stable (as illustrated in Case-2) ...

Page 47

... ST7586S Power OFF Referential Operation Flow Item Symbol Case-1 t OFF-RESB Power OFF Time Case-2 t OFF-PW VDD2 power ON delay t OFF-V2 Note: In Case-2, RSTB can fall to VSS at the same time as VDDI. Ver-1.1b Case-1: Use RSTB Case-2: Power OFF at Sleep State Requirement 200ms t Power can be turned OFF after built-in power becomes OFF-RESB VSS ...

Page 48

... ST7586S OTP Operation Referential OTP Burning Flow Note: In this section “+” and “-” key button, please execute command C1h to increase one step at Vop and execute command C2h to decrease one step at Vop. Ver-1.1b 48/63 2009/12/23 ...

Page 49

... ST7586S Referential OTP Operation Code void Initialization_ST7586S(void) { Reset_ms(10); Delay_ms(120); Write(Command, 0xD7); Write(Data, 0x9F); Write(Command, 0xE0); Write(Data, 0x00); Delay_ms(10); Write(Command, 0xE3); Delay_ms(20); Write(Command, 0xE1); Write(Command, 0x11); Write(Command, 0x28); Delay_ms(50); Write(Command, 0xC0); Write(Data, 0xB9); Write(Data, 0x00); Write(Command, 0xC3); Write(Data, 0x05); Write(Command, 0xC4); Write(Data, 0x07); ...

Page 50

... ST7586S Write(Command, 0x2B); Write(Data, 0x00); Write(Data, 0x00); Write(Data, 0x00); Write(Data, 0x9F); Clear_DDRAM(); Write(Command, 0x2A); Write(Data, 0x00); Write(Data, 0x00); Write(Data, 0x00); Write(Data, 0x4F); Write(Command, 0x2B); Write(Data, 0x00); Write(Data, 0x00); Write(Data, 0x00); Write(Data, 0x78); Disp_Image(); Write(Command, 0x29); } Ver-1.1b // Row Address Setting // COM0 -> COM160 // Clear whole DDRAM by “ ...

Page 51

... ST7586S void Set_OTP_Register(void) { Write(Command, 0xB5); Write(Data, 0x8C); } void Vop_Fine_Tune(v { Disp_Image(); Write(Command, 0x29); Write(Command, 0xC1); or Write(Command, 0xC2); } void OTP_Write(void) { Write(Command, 0x28); Delay_ms(50); Write(Command, 0xF1); Write(Data, 0x12); Write(Data, 0x12); Write(Data, 0x12); Write(Data, 0x12); Write(Command, 0xE4); Write(Data, 0x59); Write(Command, 0xE5); Write(Data, 0x0F); Write(Command, 0xE0); ...

Page 52

... ST7586S HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However totally safe desirable to take normal precautions appropriate to handling MOS devices. ABSOLUTE MAXIMUM RATINGS Parameter Digital Power Supply Voltage Analog Power supply voltage LCD Power supply voltage ...

Page 53

... ST7586S DC CHARACTERISTICS VSS=VSS1=VSS2=VSS4=VSSX=0V and Ta = – ° C, unless otherwise specified. Item Symbol Digital Operating Voltage VDDI Analog Operating Voltage VDDA Input High-level Voltage V IH Input Low-level Voltage V Output High-level Voltage V OH Output Low-level Voltage V OL Input Leakage Current Resistance LCD Drivers ...

Page 54

... ST7586S TIMING CHARATERISTIC System Bus Timing for 8080 MCU Interface Item Address setup time Address hold time System cycle time (WRITE) /WR L pulse width (WRITE) /WR H pulse width (WRITE) System cycle time (READ) /RD L pulse width (READ) /RD H pulse width (READ) ...

Page 55

... ST7586S System Bus Timing for 6800 MCU Interface Item Address setup time Address hold time System cycle time (WRITE) Enable L pulse width (WRITE) Enable H pulse width (WRITE) System cycle time (READ) Enable L pulse width (READ) Enable H pulse width (READ) Write data setup time ...

Page 56

... ST7586S System Bus Timing for 4-Line SPI MCU Interface Item Serial clock period SCLK “H” pulse width SCLK “L” pulse width Address setup time Address hold time Data setup time Data hold time CSB-SCLK time CSB-SCLK time Note: 1. The input signal rise and fall time (tr, tf) are specified less. ...

Page 57

... ST7586S System Bus Timing for 3-Line SPI MCU Interface Item Serial Clock Period SCL “H” pulse width SCL “L” pulse width Data setup time Data hold time CS-SCL time CS “H” pulse width Note: 1. The input signal rise and fall time (tr, tf) are specified less. ...

Page 58

... ST7586S Reset Timing RSTB Internal Status Item Reset time Reset “L” pulse width Ver-1. During Reset ... Symbol Condition tR tRW 58/63 Reset Finished ° VDD1 = 1.8V Min. Max. Unit 120 — — us 2009/12/23 ...

Page 59

... ST7586S APPLICATION NOTE ITO Layout Guide The ITO layout suggestion is shown as below: For V0, XV0, VG, VDD and VSS Fig ITO Layout Driver Side Fig ITO Layout Ver-1.1b Driver Side Fig. 15 Fig. 17 Fig. 18 VDD ITO Layout 59/63 XV0 ITO Layout VSS ITO Layout ...

Page 60

... ST7586S For VPP This is the power source for programming the internal OTP. If the ITO resistance is too high, the operation current will cause the voltage drop while programming OTP. Please try to keep the ITO resistance as low as possible. Enhance ESD performance for COG application 1 ...

Page 61

... ST7586S Selection of Liquid Crystal Referential LCD Module Setting VDD1=2.8V, VDD2=VDD3=VDD4=VDD5=VDDX=2.8V, Panel Size=4.0”, Booster Level=X8, N-Line=Frame Inversion Display Mode Duty 80 4-Level Gray Scale 160 80 Monochrome 160 In different range of partial area, the Vop and BIAS setting must within the Recommended Parameter of Liquid Crystal after consider the temperature effect and user adjustment. ...

Page 62

... ST7586S Application Circuit Parallel 8080 Interface COM39 COM41 VSS1 VGI VGI VGI VGI VGI VGI VGS VGO VGO XV0I XV0I XV0I XV0I XV0S XV0O COM157 XV0O COM159 V0O V0O SEG0 V0S SEG1 V0I V0I V0I V0I VREF VDD2 VDD2 VDD2 ...

Page 63

... Fix font error. Add Page 8 & 8. Fix VDDI/VDDA range. Fix VDD1 naming in PAD CENTER COORDINATES. Fix pin description mistakes. Rename as ST7586S Fix typing mistakes in DC CHARACTERISTICS. Modify section of FUNCTION DESCRIPTION,. Add sections of RESET CIRCUIT, INSTRUCTION TABLE, INSTRUCTION DESCRIPTION, OPERATION FLOW and TIMING CHARATERISTIC. ...

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