DSPIC30F2012 Microchip Technology Inc., DSPIC30F2012 Datasheet - Page 66

• Manufacturer Part Number: DSPIC30F2012
• Description: Dspic30f2011/2012/3012/3013 High-performance Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

dsPIC30F2011/2012/3012/3013
8.1
The user assignable interrupt priority (IP<2:0>) bits for
each individual interrupt source are located in the LS
3 bits of each nibble within the IPCx register(s). Bit 3 of
each nibble is not used and is read as a ‘0’. These bits
define the priority level assigned to a particular interrupt
by the user.
Natural Order Priority is determined by the position of
an interrupt in the vector table, and only affects
interrupt operation when multiple interrupts with the
same user-assigned priority become pending at the
same time.
Table 8-1 lists the interrupt numbers and interrupt
sources
devices and their associated vector numbers.
The ability for the user to assign every interrupt to one
of seven priority levels means that the user can assign
a very high overall priority level to an interrupt with a
low natural order priority. For example, the PLVD (Low
Voltage Detect) can be given a priority of 7. The INT0
(External Interrupt 0) may be assigned to priority level
1, thus giving it a very low effective priority.
DS70139E-page 64
Note:
Note 1: The natural order priority scheme has 0
2: The natural order priority number is the
Interrupt Priority
for
The user selectable priority levels start at
0 as the lowest priority and level 7 as the
highest priority.
as the highest priority and 53 as the
lowest priority.
same as the INT number.
the
dsPIC30F2011/2012/3012/3013
TABLE 8-1:
Highest Natural Order Priority
Lowest Natural Order Priority
Number
*
17-22
26-41
43-53
INT
10
11
12
13
14
15
16
23
24
25
42
Only the dsPIC30F3013 has UART2 and the U2RX,
U2TX interrupts. These locations are reserved for
the dsPIC30F2011/2012/3012.
0
1
2
3
4
5
6
7
8
9
Number
Vector
25-30
34-49
51-61
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
31
32
33
50
8
9
INTERRUPT VECTOR TABLE
INT0 — External Interrupt 0
IC1 — Input Capture 1
OC1 — Output Compare 1
T1 — Timer 1
IC2 — Input Capture 2
OC2 — Output Compare 2
T2 — Timer 2
T3 — Timer 3
SPI1
U1RX — UART1 Receiver
U1TX — UART1 Transmitter
ADC — ADC Convert Done
NVM — NVM Write Complete
SI2C — I
MI2C — I
Input Change Interrupt
INT1 — External Interrupt 1
Reserved
INT2 — External Interrupt 2
U2RX* — UART2 Receiver
U2TX* — UART2 Transmitter
Reserved
LVD — Low-Voltage Detect
Reserved
© 2006 Microchip Technology Inc.
Interrupt Source
2
2
C™ Slave Interrupt
C Master Interrupt