EM65568 ELAN Microelectronics Corp, EM65568 Datasheet - Page 68

Manufacturer Part Number

EM65568

Description

130 Com/ 128 Seg 4096 Color Stn Lcd Driver

Manufacturer

ELAN Microelectronics Corp

Datasheet

1.EM65568.pdf (112 pages)

(At the time of reset: {AY7, AY6, AY5, AY4}=0H, read address: 3H)

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The AY register set to Y-direction address of display RAM. In data setting, lower place and upper place are divided with 4-bit

and 4-bit respectively. 00H to 81H are applicable to the values for AY7 to AY0, and 82H to FFH are not permitted. The address

for (AY7 to AY0) = 70H, 81H are in the display RAM area for icon display.

8.2.3 Display Start Address Register (LA)

(At the time of reset: { LA6, LA5, LA4}=0H, read address: 5H)

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The LA register indicated first output segment data in display RAM. This segment data output to common line indicated by SC

8.2.4 n Line Alternated Register (N)

(At the time of reset: {N3, N2, N1, N0}=0H, read address: 6H)

(At the time of reset: {N7,N6, N5, N4}=0H, read address: 7H)

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The reverse line number of LCD alternated drive is required to set in the register. The line number has a limit, must keeps

between from 2 to 80 lines. The values set up by the alternated register become enable when NLIN control bit is “1”. When

NLIN control bit is “0”, alternated drive waveform reverses by each frame is generated.

* This specification is subject to be changed without notice.

(At the time of reset: {LA3, LA2, LA1, LA0}=0H, read address: 4H)

LA6

LA5

LA4

LA3 LA2 LA1 LA0

LA3

LA6 LA5 LA4

LA2

LA1

LA0

CSB

130 COM/ 128 SEG 4096 Color STN LCD Driver

RDB WRB RE2 RE1 RE0

Line Address

127

2005/3/8 (V1.2)

EM65568