EM6605 EM Microelectronic, EM6605 Datasheet
EM6605
Related parts for EM6605
EM6605 Summary of contents
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... EM6605 - 4 bit Microcontroller Features Low Power - typical 4.0µA active mode - typical 2.5µA standby mode - typical 0.3µA sleep mode @ 1.8V, 32kHz, 25 °C Low Voltage - 1.8 to 5.5V RC oscillator 30 - 300kHz buzzer - three tone ROM - 2k 16 (Mask Programmed) RAM - 96 4 (User Read/Write) 2 clocks per instruction cycle RISC architecture ...
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... EM6605 at a glance Power Supply - Low Voltage, low power architecture including internal voltage regulator - 1.8V ... 5.5 V battery voltage - 4.0 - 2.5 - 0.3 @ 1.8V, 32kHz, 25 ° oscillator from 30-300kHz RAM - bit, direct addressable ROM - 2048 x 16 bit metal mask programmable CPU - 4 bit RISC architecture - 2 clock cycles per instruction ...
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... Figure 12.Serial write buffer ........................................ 23 Figure 13.Automatic Serial Write Buffer transmission . 24 Figure 14.Interactive Serial Write Buffer transmission. 26 Figure 15. EM6605 PAD Location Diagram................. 40 Figure 16. Dimensions of DIP24 Package – “A” ......... 41 Figure 17. Dimensions of TSSOP24 Package – “F” ... 42 Figure 18.Dimensions of SOIC24 Package – “B” ....... 42 ...
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... Treat this node as Quartz node. For Vdd less then 2. recommended that Vdd is connected directly to Vreg For Vdd>2.2V then the configuration shown in Fig.3 should be used. © EM Microelectronic-Marin SA, 02/99, Rev. B/243 4 EM6605 Remarks interrupt request; tvar 1 interrupt request; tvar 2 interrupt request; tvar 3 interrupt request ...
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... SLEEP mode (SLmask = 1). 2. Power Supply The EM6605 is supplied by a single external power supply between Vdd and Vss, the circuit reference being at Vss (ground). A built-in voltage regulator generates Vreg providing regulated voltage for the oscillator and internal logic. Output drivers are supplied directly from the external supply Vdd. A typical connection configuration is shown in Figure 3 ...
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... Reset To initialise the EM6605, a system RESET must be executed. There are four methods of doing this: (1) Initial RESET from the oscillation detection circuit. (2) External RESET from the RESET PIN. (3) External RESET by simultaneous high input to terminals PA0..PA3. (Combinations defined by metal option) (4) Watchdog RESET (software option). ...
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... Opt. Code RA0 RA1 RA2 RA3 NoWD bit in Option register 1 0 symbol initial value PC0 $000 (as a result of Jump 0) PC1 undefined PC2 undefined SP SP(0) selected IX undefined CY undefined Z undefined HALT 0 IR Jump 0 see peripheral memory map EM6605 © EM Microelectonic-Marin SA, 02/99, Rev. B/243 7 ...
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... Hz 2 048 Hz 8 192 / *1 024 Hz 2 667 Hz 10 667 Hz Table 7.Prescaler interrupt source Interrupt frequency mask(no interrupt) ck[1] ck[4] ck[6] EM6605 frequency 3 (*f3) 327 680 Hz 163 480 Hz 81 920 Hz 40 960 Hz 20 480 Hz 10 240 Hz 5 120 Hz 2 560 Hz 512 Hz 1 280 Hz ...
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... Name 3 WDRST 2 Slmask 1 WD1 0 WD0 Reset R/W Description 0 R/W Timer/Counter Interrupt Mask - R/W Prescaler reset 0 R/W Prescaler Interrupt select 1 0 R/W Prescaler Interrupt select 0 Reset R/W Description - R/W Watchdog timer reset - R/W SLEEP mask bit Timer data ck[1]/4 (1/4Hz *f1 Timer data ck[1]/2 (1/2 Hz *f1) EM6605 © EM Microelectonic-Marin SA, 02/99, Rev. B/243 9 ...
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... NoWD - by default after reset Watchdog timer is On. Writing removes the WatchDog timer. 6.1. PortA The EM6605 has one four bit general purpose input port. Each of the input port terminals PA3..PA0 has an internal Pull-Up/Down resistor which can be selected with mask options. Port information is read directly from the pin into a register ...
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... PA2 interrupt request flag 0 R input PA1 interrupt request flag 0 R input PA0 interrupt request flag Reset R/W Description 0 R/W interrupt mask for input PA3 0 R/W interrupt mask for input PA2 0 R/W interrupt mask for input PA1 0 R/W interrupt mask for input PA0 EM6605 © EM Microelectonic-Marin SA, 02/99, Rev. B/243 11 ...
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... PortB The EM6605 has one four bit general purpose I/O port. Each bit PB(0:3) can be separately configured by software to be either input or output by writing to the corresponding bit of the CIOPortB control register. The PortB register is used to read data when in input mode and to write data when in output mode. On each terminal Pull-Up/Down resistor can be selected by metal option when input ...
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... R input PC0 interrupt request flag Reset R/W Description 0 R/W interrupt mask for input PC3 0 R/W interrupt mask for input PC2 0 R/W interrupt mask for input PC1 0 R/W interrupt mask for input PC0 EM6605 IRQPC PA&C Request to CPU Yes 0 0 Yes 1 0 Yes ...
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... Figure 8.Port C For PortC and PortD metal options 5Y/N and 6Y/N are Port-wise (for the whole port). For PortB these options are bit-wise (every terminal can have individual mask set-up for the options 5Y/N and 6Y/N ). © EM Microelectronic-Marin SA, 02/99, Rev. B/243 14 EM6605 ...
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... PortD The EM6605 has one all purpose I/O port similar to PortC but without interrupt capability. The PortD register is used to read input data when an input and to write output data for output. The input line can be pulled down (metal option) when the port is used as input. Input mode is set by writing 0 to the I/O control bit CIOPD in register CPIOB, and the terminal becomes high impedance ...
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... BUZZER The EM6605 has one 50% duty cycle output with three different frequencies which can be used to drive a buzzer. I/O terminal PB0 is used for this function when the buzzer is enabled by setting the BUen bit Table 23 below shows how to select the frequency by writing to the BCF1 and BCF0 control flags in the BEEP register ...
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... Timer/Event Counter The EM6605 has a built-in 8 bit auto-reload Timer/Event counter that takes an input from either the prescaler or Port PA3. If the Timer/Event counter counts down to $00 the interrupt request flag INTTE is set the Timer/Event counter interrupt is enabled by setting the mask flag MTimC set to 1, then an interrupt request is generated to the CPU ...
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... Timer load/status bit 5 0 R/W Timer load/status bit 4 Reset R/W Description - - empty - - empty - - empty 0 R/W PA0 input status IRQedgeR Counter source X PA3 debounced rising edge 0 PA3 debounced falling edge 1 PA3 debounced rising edge 0 PA3 not debounced falling edge 1 PA3 not debounced rising edge EM6605 ...
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... Interrupt Controller The EM6605 has six different interrupt sources, each of which is maskable. These are: External (3) - PortA PA3..PA0 inputs - PortC PC3..PC0 inputs - combined AND of PortA * PortC Internal (3) - Prescaler ck[6] / ck[4] / ck[1] - Timer/Event counter - SWB in interactive mode For an interrupt to the CPU to be generated, the interrupt request flag must be set (INTxx), and the corresponding mask register bit must be set to 1 (Mxx), the general interrupt enable flag (INTEN) must also be set to 1 ...
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... Timer IRQ flag INTTE and prescaler IRQ flag INTPR arrive independent of their mask bits not to loose any timing information. But the © EM Microelectronic-Marin SA, 02/99, Rev. B/243 20 Reset R/W Description - - - - - - 0 R/W Debouncer clock select (0=t 0 R/W Enable interrupt to CPU (1=enabled) IRQ mask bit which can be written enable an interrupt) interrupt request flag which is set on the input rising edge EM6605 : 1 debS debL ...
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... Supply Voltage Level Detector (SVLD) The EM6605 has a software configurable built-in supply voltage level detector. Three levels can be defined between VDDmin + 100mV and VDDmax - 1000mV in steps of 100mV. During SLEEP mode this function is disabled. The required voltage compare level is selected by writing the bits VLC1 and VLC2 in the SVLD control register which also activates the compare measurement ...
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... Serial (Output) Write Buffer - SWB The EM6605 has simple Serial Write Buffer (SWB) which outputs serial data and serial clock. The SWB is enabled by setting the bit V03 in the CLKSWB register as well as setting port D to output mode. The combination of the possible PortD mode is shown in Table 357. In SWB mode the serial clock is output on port D0 and the serial data is output on port D1. The signal TestVar[3], which is used by the processor to make conditional jumps, indicates " ...
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... Auto mode buffer size bit3 0 R/W Auto mode buffer size bit2 0 R/W Auto mode buffer size bit1 0 R/W Auto mode buffer size bit0 Reset R/W Description 0 R/W SWB Automatic mode select 0 R/W SWB start interactive mode 0 R/W Auto mode buffer size bit5 0 R/W Auto mode buffer size bit4 EM6605 © EM Microelectonic-Marin SA, 2/99, Rev. B/243 23 ...
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... HALT instruction. With this serial transmission starts. When transmission is finished the TESTvar[3] (can be used for conditional jumps) becomes active High, the AutoSWB bit is cleared, the processor is leaving the Standby mode and INTEN is switched on. Figure 13.Automatic Serial Write Buffer transmission © EM Microelectronic-Marin SA, 02/99, Rev. B/243 24 EM6605 ...
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... Because the data in the RAM are still present one can start transmitting the same data once again only by recharging the SWBuff , LowSWB and HighSWB register together with AutoSWB bit and putting the EM6603 in HALT mode will start new transmission. EM6605 © EM Microelectonic-Marin SA, 2/99, Rev. B/243 25 ...
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... Interrupt subroutine that the STSWB bit went low before exiting interrupt. Be careful because if STSWB bit is cleared by software transmission is stopped immediately. At the end of transmission a dummy write of SWBuff must be done to clear TESTvar[3] and "SWBbuffer empty interrupt" or the next transmission will not work. © EM Microelectronic-Marin SA, 02/99, Rev. B/243 26 EM6605 ...
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... STroBe / RESet Output The STB/RST output pin is used to indicate the EM6605 RESET condition as well as write operations to ports B, C and D. For a PortB, PortC and PortD write operation the STROBE signal goes high for half of the system clock period. Write is effected on falling edge of the strobe signal and it can this be used to indicate when data changes at the output port pins ...
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... Yes / PA0 & PA1 logic AND PA0 & PA1 & PA2 logic input reset AND input reset 1 typ. VL1 level [V] typ. VL2 level [V] _____________ kHz EM6605 Input blocked when Output Hi-Z in Output SLEEP mode Yes / No Yes / PA0 & PA1 & PA2 & PA3 ...
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... Peripheral memory map The following table shows the peripheral memory map of the EM6605. The address space is between $00 and $7F (Hex). Any addresses not shown can be considered to be reserved. Register add add power name hex dec up value b’3210 RAM 00- 0-95 xxxx 5f LTimLS 60 96 0000 ...
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... PSF0 1: PSF1 1: PSF1 2: PRST MTim 3: MTim 0: BCF0 1: BCF1 2: BUen 3: TimEn ---- ---- EM6605 Remarks interrupt requests sleep mode WatchDog timer control and SLEEP mask Port A status Port A interrupt request Port A mask Port B Input/Output Port B Input/Output individual control Port C Input/Output Port C interrupt request ...
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... C urrent ratio 5V I (RC int (Re xt [°C] 80 EM6605 IVDDa[µA] ~ IVDDh + f[kHz]*0.067 I(V DDh) S tandB y = f(freq), V DD=3V I(Rext) @ X=1/5 50 100 150 200 250 I(V DDh) S tandB 3.0/5.0V ,Rext=330k Ohm [°C] - [°C] - ...
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... Frequency Last table on previous page shows already that we can adjust the frequency tw. needed resistor also with different current mirror IRCint / IRext. Please contact EM Marin directly when ordering EM6605 if you would like to profit this possibility. Next figures show the frequency dependence on Rext when IRCint / IRext = 1/5 freq = f(T), V DD= 3 ...
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... [°C] -40 IOH P ortC,S tb/ DD= 5. 0.3/0.5/1.0V - 0.5 0 [°C] -4 EM6605 IOH P ortB ; 0.3/0. 25°C 2.8 3.8 0.3V IOH P ortB ; V DD= 3. 0.3/0.5/1.0V - IOH P ortB ; V DD= 5. 0.3/0.5/1.0V - [°C] - © EM Microelectonic-Marin SA, 2/99, Rev. B/243 [V] 4.8 [° ...
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... IOH PortC,S tb/ DD=5.0V; VDS= 0.3/0.5/1.0V - 0 [°C] - 0 [°C] - 0 [°C] EM6605 [°C] - IOH P ortD; VDD= 5.0V =0.3/0.5/1.0V [°C] - IOH P ortD; VDD= 5.0V =0.3/0.5/1.0V - 0.3 0.5 1.0 80 0.3 0.5 1.0 [°C] 80 0.3 0.5 1.0 ...
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... EM6605 Pull-Up/Down PortB ; V DD= 3.0V [°C] - © EM Microelectonic-Marin SA, 2/99, Rev. B/243 optH optM optL 35 ...
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... With internal voltage regulator regulated voltage capacitor tow. Vss external resistor to set frequency - 330k (note4) (unless otherwise specified), f Symb. Min. IVDDa IVDDa IVDDh IVDDh IVDDs IVDDs VPOR Vrd Vreg and 120k EM6605 unit V V °C . Description 200kHz, IRCint / IRext = 1/5 Typ. Max. Unit (note1) 17.0 22.0 µA 25.0 µ ...
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... Typ. Max. Vss 0. Vss 0.3V Vss 0.3V Vss 0. 0.9Vreg Vreg IOL 8.5 0.90 1.10 IOL 10.0 15.0 1.0 1.20 1.0 1.60 IOL 20.0 1.80 2.00 IOH 5.40 0.70 0.95 IOH 8.0 13.0 1.0 1.50 1.0 1.80 IOH 15.0 1.70 1.90 © EM Microelectonic-Marin SA, 2/99, Rev. B/243 EM6605 Unit reg ...
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... L2 L3 Conditions Symb. Min +25° 0°C...+65° 1.5V<VDD 3V < I SVLD EM6605 Typ. Max. Unit 170 100 k 80 170 330 150 k ...
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... -20 2 -2% -40°C- +85° 0.02% Vdd>1.8V Rext 80* Cext Vdd>1.8V tdosc Vdd>1.8V tdsys Vdd>1.8V & Vdd<5.0V Conditions RESET from SLEEP DebCK = 0 DebCK = 0 DebCK = 1 DebCK = 1 EM6605 Typ. Max. Unit + +2% 1/V 0.3 +0.06% 0.1% 1/°C 120-330 600* k 150 390 pF 0 4.0 15 kHz Symb ...
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... Die: Pad Location Diagram All dimensions in Microns © EM Microelectronic-Marin SA, 02/99, Rev. B/243 40 EM6605 PAD Location Diagram Figure 15. EM6605 EM6605 ...
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... Packages Dimensions of DIP24 Package Figure 16. – package type “A” P-DIP24 .300 INCH body width EM6605 © EM Microelectonic-Marin SA, 2/99, Rev. B/243 41 ...
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... Figure 17. Dimensions of TSSOP24 Package Figure 18.Dimensions of SOIC24 Package VISUAL control on wafer: AQL = 0.4% for all visual defects. © EM Microelectronic-Marin SA, 02/99, Rev. B/243 42 – package type “F” TSSOP24 (0.65mm pitch, 4.4mm body width) – package type “B” SOP-24 (1.27mm pitch, 300mils body width) EM6605 ...
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... CHIP marking : Independent on the package there is always marking EM6605 followed by the: Version number given by EM Microelectronic Marin production identification given by EM Microelectronic Marin Customer marking selected by customer (letters, numbers, -, empty space) 20.1. CUSTOMER marking : There are 11 digits available for customer marking on DIP24 and SOIC24. ...