MB1503 Fujitsu Media Devices, MB1503 Datasheet - Page 6

• Manufacturer Part Number: MB1503
• Description: LOW-POWER PLL FREQUENCY SYNTHESIZER
• Manufacturer: Fujitsu Media Devices

6
MB1503
(b)
14-bit programmable reference counter divide ratio
Notes: 1. Divide ratios less than 8 are prohibited
Programmable divider divide ratio
The programmable divider consists of a 19-bit shift register, 18-bit latch, 7-bit swallow counter, and 11-bit programmable
counter. The serial 19-bit data format is shown below:
Divide ratio
16383
R
8
9
2. SW: This bit selects the divide ratio of the prescaler
3. S1 to S14: These bits select the divide ratio of the programmable reference counter (8 to 16,383)
4. C: Control bit: Set high
5. Input MSB data first
C
SW Low: 128 or 129 (SW must be always be low)
S
1
14
S
0
0
1
Divide ratio setting bit for
S
2
Control bit
LSB
swallow counter
S
3
13
S
0
0
1
S
4
12
S
0
0
1
S
5
Direction of data shift
11
S
0
0
1
S
6
S
7
10
S
0
0
1
S
8
S
9
0
0
1
Divide ratio setting bit for programmable counter
S
9
S
8
0
0
1
10
S
11
S
S
7
0
0
1
12
S
S
6
0
0
1
13
S
S
5
0
0
1
14
S
15
S
S
(Divide ratio = 8 to 16,383)
4
1
1
1
MSB
16
S
S
3
0
0
1
17
S
S
2
0
0
1
18
S
S
1
0
1
1