MAX1258 Maxim Integrated Products, MAX1258 Datasheet - Page 16

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MAX1258

Manufacturer Part Number
MAX1258
Description
Multichannel ADCs/DACs
Manufacturer
Maxim Integrated Products
Datasheet

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12-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
16
MAX1220/
15, 23, 32,
MAX1221
24, 25
16–19
9–12,
1, 2
13
14
33
20
21
22
______________________________________________________________________________________
3
4
5
6
7
8
2, 15, 24, 32
MAX1222/
MAX1223
16–19
9–12,
PIN
13
14
20
21
22
3
4
5
6
7
8
MAX1257/
MAX1258
12–15,
22–25
10
11
18
19
26
27
28
4
7
8
9
GP IOA0, G P IOA1 General-Purpose I/O A0, A1. GPIOA0, A1 can sink and source 15mA.
OUT0–OUT7
RES_SEL
GP IOC 0,
GP IOC 1
NAME
DGND
AGND
DOUT
LDAC
DV
SCLK
AV
EOC
N.C.
DIN
CS
DD
DD
Active-Low End-of-Conversion Output. Data is valid after the falling edge of
EOC.
Digital Positive-Power Input. Bypass DV
Digital Ground. Connect DGND to AGND.
Serial-Data Output. Data is clocked out on the falling edge of the SCLK
clock in modes 00, 01, and 10. Data is clocked out on the rising edge of the
SCLK clock in mode 11. It is high impedance when CS is high.
Serial-Clock Input. Clocks data in and out of the serial interface. (Duty cycle
must be 40% to 60%.) See Table 5 for details on programming the clock
mode.
Serial-Data Input. DIN data is latched into the serial interface on the falling
edge of SCLK.
DAC Outputs
Positive Analog Power Input. Bypass AV
Analog Ground
No Connection. Not internally connected.
Active-Low Load DAC. LDAC is an asynchronous active-low input that
updates the DAC outputs. Drive LDAC low to make the DAC registers
transparent.
Active-Low Chip-Select Input. When CS is low, the serial interface is
enabled. When CS is high, DOUT is high impedance.
Reset Select. Select DAC wake-up mode. Set RES_SEL low to wake up the
DAC outputs with a 100kΩ resistor to GND or set RES_SEL high to wake up
the DAC outputs with a 100kΩ resistor to V
up the DAC input register to FFFh. Set RES_SEL low to power up the DAC
input register to 000h.
G ener al - P ur p ose I/O C 0, C 1. G P IO C 0, C 1 can si nk 4m A and sour ce 2m A.
FUNCTION
DD
DD
REF
to DGND with a 0.1µF capacitor.
to AGND with a 0.1µF capacitor.
. Set RES_SEL high to power
Pin Description

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