WM8581 Wolfson Microelectronics Ltd., WM8581 Datasheet - Page 49

• Manufacturer Part Number: WM8581
• Description: Multichannel Codec with S/pdif Transceiver
• Manufacturer: Wolfson Microelectronics Ltd.

Production Data
PHASE-LOCKED LOOPS AND S/PDIF CLOCKING (SOFTWARE MODE)
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MANUAL CLOCK SELECTION
It is possible to override all default clocking configuration restrictions by setting CLKSEL_MAN. When
CLKSEL_MAN is set, default clocking configurations such as automatic selection of PLLACLK for
DAC1 when DACSRC=00 (S/PDIF received data) are not applied. Instead, clock selection is
determined only by the relevant CLK_SEL register.
Table 38 Manual Clock Selection
The WM8581 is equipped with two independent phase-locked loop clock generators and a
comprehensive clocking scheme which provides maximum flexibility and function and many
configurable routing possibilities for the user in software mode. An overview of the software mode
clocking scheme is shown in Figure 32.
Figure 32 PLL and Clock Select Circuit
REGISTER
ADDRESS
CLKSEL
08h
R8
BIT
6
CLKSEL_MAN
LABEL
DEFAULT
0
Clock selection auto-configuration
override
0 = auto-configuration enabled,
clock configuration follows
restrictions described in page 43
to page 48.
1 = auto-configuration disabled,
clock configuration follows
relevant CLKSEL bits in R8 to
R11.
DESCRIPTION
PD Rev 4.0 April 2007
WM8581
49