WM8581 Wolfson Microelectronics Ltd., WM8581 Datasheet - Page 86
WM8581
Manufacturer Part Number
WM8581
Description
Multichannel Codec with S/pdif Transceiver
Manufacturer
Wolfson Microelectronics Ltd.
Datasheet
1.WM8581.pdf
(100 pages)
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WM8581
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ATTENUATION
ATTENUATION
ATTENUATION
ATTENUATION
REGISTER
SPDTXCHAN 0
CONTROL
ADDRESS
MASTER
DIGITAL
DIGITAL
DIGITAL
DIGITAL
DACR 3
DACR 4
DACL 4
ADC
R25
R26
1Ah
R27
1Bh
R28
1Ch
R29
1Dh
R30
1Eh
19h
1
BIT
7:0
7:0
7:0
7:0
7:5
1:0
8
8
8
8
0
1
2
3
4
8
ADCRATE[2:0]
MASTDA[7:0]
AMUTEALL
TXSRC[1:0]
RDA3[7:0]
RDA4[7:0]
LDA4[7:0]
VMIDSEL
AMUTER
ADCOSR
ADCHPD
UPDATE
UPDATE
UPDATE
UPDATE
AMUTEL
LABEL
Not latched
Not latched
Not latched
Not latched
11111111
11111111
11111111
11111111
DEFAULT
(0dB)
(0dB)
(0dB)
(0dB)
010
10
1
0
0
0
0
0
Digital Attenuation control for DAC3 Right Channel (DACR3) in
0.5dB steps. See Table 23
Controls simultaneous update of all Attenuation Latches
Digital Attenuation control for DAC4 Left Channel (DACL4) in
0.5dB steps. See Table 23
Controls simultaneous update of all Attenuation Latches
Digital Attenuation control for DAC4 Right Channel (DACR4) in
0.5dB steps. See Table 23
Controls simultaneous update of all Attenuation Latches
Digital Attenuation control for all DAC channels in 0.5dB steps.
See Table 23
Controls simultaneous update of all Attenuation Latches
ADC Mute select
ADC Mute select
ADC Mute select
ADC oversample rate select
ADC high-pass filter disable:
ADC Rate Control (only used when the S/PDIF Transmitter is the
only interface sourcing the ADC)
VMID Impedance Selection
0 = High impedance, power saving
1 = Low impedance, fast power-on
S/PDIF Transmitter Data Source
00 = S/PDIF received data (see REAL_THROUGH)
01 = ADC digital output data.
10 = Secondary Audio Interface
11 = Audio Interface received data
0 : Normal Operation
1: mute ADC left
0 : Normal Operation
1: mute ADC right
0 : Normal Operation
1: mute both ADC channels
0 = high-pass filter enabled
1 = high-pass filter disabled
000 = 128fs
001 = 192fs
010 = 256fs
011 = 384fs
100 = 512fs
101 = 768fs
110 = 1152fs
0 = Store RDA3 in intermediate latch (no change to output)
1 = Apply RDA3 and update attenuation on all channels
0 = Store LDA4 in intermediate latch (no change to output)
1 = Apply LDA4 and update attenuation on all channels
0 = Store RDA4 in intermediate latch (no change to output)
1 = Apply RDA4 and update attenuation on all channels
0 = Store gain in intermediate latch (no change to output)
1 = Apply gain and update attenuation on all channels
0 = 128/64 x oversampling
1 = 64/32 x oversampling
DESCRIPTION
PD Rev 4.0 April 2007
Production Data
86
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