WM8581SEFT Wolfson Microelectronics Ltd., WM8581SEFT Datasheet - Page 15
WM8581SEFT
Manufacturer Part Number
WM8581SEFT
Description
Multichannel Codec with S/pdif Transceiver
Manufacturer
Wolfson Microelectronics Ltd.
Datasheet
1.WM8581SEFT.pdf
(94 pages)
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CONTROL INTERFACE TIMING – 3-WIRE MODE
Figure 4 SPI Compatible Control Interface Input Timing
Table 6 3-wire SPI Compatible Control Interface Input Timing Information
CONTROL INTERFACE TIMING – 2-WIRE MODE
w
Figure 5 Control Interface Timing – 2-Wire Serial Control Mode
Test Conditions
AVDD, PVDD = 5V,DVDD = 3.3V, AGND, PGND,DGND = 0V, T
otherwise stated
SCLK rising edge to CSB rising edge
SCLK pulse cycle time
SCLK duty cycle
SDIN to SCLK set-up time
SDIN hold time from SCLK rising edge
SDO propagation delay from SCLK rising
edge
CSB pulse width high
CSB rising/falling to SCLK rising
Pulse width of spikes that will be suppressed
SDIN
SCLK
SCLK
SDIN
CSB
SDO
PARAMETER
t
3
t
1
t
6
t
CSS
t
9
t
DSU
t
2
t
t
DHO
t
SYMBOL
DL
7
t
SCY
t
t
t
t
t
t
DSU
DHO
t
CSH
SCS
SCY
CSS
t
t
DL
ps
5
A
= +25
o
C, fs = 48kHz, MCLK and ADCMCLK = 256fs unless
40/60
MIN
60
80
20
20
20
20
2
t
4
t
LSB
3
t
SCS
TYP
LSB
t
CSS
t
PP Rev 1.0 March 2006
CSH
60/40
MAX
5
8
WM8581
t
8
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
15
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