MAX525 Maxim, MAX525 Datasheet - Page 11

• Manufacturer Part Number: MAX525
• Description: Low-Power / Quad / 12-Bit Voltage-Output DAC with Serial Interface
• Manufacturer: Maxim

Figure 5. Serial-Interface Timing Diagram
Figure 6. Detailed Serial-Interface Timing Diagram
The power-down lockout pin PDL disables software
shutdown when low. When in shutdown, transitioning
PDL from high to low wakes up the part with the output
set to the state prior to shutdown. PDL could also be
used to asynchronously wake up the device.
Any number of MAX525s can be daisy chained by con-
necting the DOUT pin of one device to the DIN pin of
the following device in the chain (Figure 7).
DOUT
Low-Power, Quad, 12-Bit Voltage-Output DAC
SCLK
DIN
CS
(MODE 0)
(MODE 1)
DOUT
SCLK
DOUT
DIN
CS
t
CSO
______________________________________________________________________________________
Power-Down Lockout (
A1
A1
A1
t
CSS
Daisy Chaining Devices
1
t
MSB FROM
PREVIOUS WRITE
A0
MSB FROM
PREVIOUS WRITE
DS
A0
t
A0
DH
C1
C1
C1
C0 D11 D10 D9
C0
C0
t
CL
D11 D10 D9
D11 D10 D9
t
CH
DATA PACKET (N-1)
DATA PACKET (N-1)
DATA PACKET (N)
PDL )
D8
D8
D8
8
D7
D7
D7
9
Since the MAX525’s DOUT pin has an internal active
pull-up, the DOUT sink/source capability determines
the time required to discharge/charge a capacitive
load. Refer to the serial-data-out V
cations in the Electrical Characteristics.
Figure 8 shows an alternate method of connecting sev-
eral MAX525s. In this configuration, the data bus is
common to all devices; data is not shifted through a
daisy chain. More I/O lines are required in this configu-
ration because a dedicated chip-select input (CS) is
required for each IC.
D6
D6
D6
D5
with Serial Interface
D5
D5
t
DO1
D4
D4
D4
t
D3
CP
t
DO2
D3
D3
D2
D2
D2
D1
D1
D1
D0
D0
D0
t
CSH
16
A1
A1
DATA PACKET (N)
DATA PACKET (N)
COMMAND
EXECUTED
t
CS1
OH
t
CSW
and V
OL
specifi-
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