MAX525 Maxim, MAX525 Datasheet - Page 8

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MAX525

Manufacturer Part Number
MAX525
Description
Low-Power / Quad / 12-Bit Voltage-Output DAC with Serial Interface
Manufacturer
Maxim
Datasheet

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Low-Power, Quad, 12-Bit Voltage-Output DAC
with Serial Interface
Figure 1. Simplified DAC Circuit Diagram
The MAX525 contains four 12-bit, voltage-output digi-
tal-to-analog converters (DACs) that are easily
addressed using a simple 3-wire serial interface. It
includes a 16-bit data-in/data-out shift register, and
each DAC has a doubled-buffered input composed of
an input register and a DAC register (see Functional
Diagram ). In addition to the four voltage outputs, each
amplifier’s negative input is available to the user.
The DACs are inverted R-2R ladder networks that con-
vert 12-bit digital inputs into equivalent analog output
voltages in proportion to the applied reference voltage
inputs. DACs A and B share the REFAB reference input,
while DACs C and D share the REFCD reference input.
The two reference inputs allow different full-scale output
voltage ranges for each pair of DACs. Figure 1 shows a
simplified circuit diagram of one of the four DACs.
The two reference inputs accept positive DC and AC
signals. The voltage at each reference input sets the
full-scale output voltage for its two corresponding
DACs. The reference input voltage range is 0V to (V
- 1.4V). The output voltages (V
a digitally programmable voltage source as:
where NB is the numeric value of the DAC’s binary
input code (0 to 4095), V
and Gain is the externally set voltage gain.
8
_______________Detailed Description
AGND
REF_
SHOWN FOR ALL 1s ON DAC
_______________________________________________________________________________________
2R
V
OUT_
2R
D0
R
= (V
REF
2R
D9
R
x NB / 4096) x Gain
REF
OUT_)
is the reference voltage,
2R
D10
R
Reference Inputs
are represented by
2R
D11
FB_
OUT_
DD
The impedance at each reference input is code-depen-
dent, ranging from a low value of 10kΩ when both
DACs connected to the reference have an input code
of 555 hex, to a high value exceeding several gigohms
(leakage currents) with an input code of 000 hex.
Because the input impedance at the reference pins is
code-dependent, load regulation of the reference
source is important.
The REFAB and REFCD reference inputs have a 10kΩ
guaranteed minimum input impedance. When the two
reference inputs are driven from the same source, the
effective minimum impedance is 5kΩ. A voltage refer-
ence with a load regulation of 6ppm/mA, such as the
MAX873, would typically deviate by 0.025LSB
(0.061LSB worst case) when driving both MAX525 ref-
erence inputs simultaneously at 2.5V. Driving the
REFAB and REFCD pins separately improves reference
accuracy.
In shutdown mode, the MAX525’s REFAB and REFCD
inputs enter a high-impedance state with a typical input
leakage current of 0.01µA.
The reference input capacitance is also code depen-
dent and typically ranges from 20pF with an input code
of all 0s to 100pF with an input code of all 1s.
All MAX525 DAC outputs are internally buffered by preci-
sion amplifiers with a typical slew rate of 0.6V/µs. Access
to the inverting input of each output amplifier provides
the user greater flexibility in output gain setting/
signal conditioning (see the Applications Information sec-
tion).
With a full-scale transition at the MAX525 output, the
typical settling time to ±1/2LSB is 12µs when loaded
with 5kΩ in parallel with 100pF (loads less than 2kΩ
degrade performance).
The MAX525 output amplifier’s output dynamic respons-
es and settling performances are shown in the Typical
Operating Characteristics .
The MAX525 features a software-programmable shut-
down that reduces supply current to a typical value of
10µA. The power-down lockout (PDL) pin must be high to
enable the shutdown mode. Writing 1100XXXXXXXXXXXX
as the input-control word puts the MAX525 in power-
down mode (Table 1).
Power-Down Mode
Output Amplifiers

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