MAX525 Maxim, MAX525 Datasheet - Page 9

• Manufacturer Part Number: MAX525
• Description: Low-Power / Quad / 12-Bit Voltage-Output DAC with Serial Interface
• Manufacturer: Maxim

In power-down mode, the MAX525 output amplifiers
and the reference inputs enter a high-impedance state.
The serial interface remains active. Data in the input
registers is retained in power-down, allowing the
MAX525 to recall the output states prior to entering
shutdown. Start up from power-down either by recalling
the previous configuration or by updating the DACs
with new data. When powering up the device or bring-
ing it out of shutdown, allow 15µs for the outputs to sta-
bilize.
The MAX525’s 3-wire serial interface is compatible
with both Microwire™ (Figure 2) and SPI™/QSPI™
(Figure 3). The serial input word consists of two address
bits and two control bits followed by 12 data bits
(MSB first), as shown in Figure 4. The 4-bit address/
control code determines the MAX525’s response out-
lined in Table 1. The connection between DOUT and
the serial-interface port is not necessary, but may be
used for data echo. Data held in the MAX525’s shift
register can be shifted out of DOUT and returned to the
microprocessor (µP) for data verification.
The MAX525’s digital inputs are double buffered.
Depending on the command issued through the serial
interface, the input register(s) can be loaded without
affecting the DAC register(s), the DAC register(s) can
be loaded directly, or all four DAC registers can be
updated simultaneously from the input registers
(Table 1).
The MAX525 requires 16 bits of serial data. Table 1 lists
the serial-interface programming commands. For cer-
tain commands, the 12 data bits are “don’t cares.” Data
is sent MSB first and can be sent in two 8-bit packets or
one 16-bit word (CS must remain low until 16 bits are
transferred). The serial data is composed of two DAC
address bits (A1, A0) and two control bits (C1, C0),
followed by the 12 data bits D11…D0 (Figure 4). The
4-bit address/control code determines:
The register(s) to be updated
The clock edge on which data is to be clocked out
via the serial-data output (DOUT)
The state of the user-programmable logic output
(UPO)
If the part is to go into shutdown mode (assuming
PDL is high)
How the part is configured when coming out of shut-
down mode.
Low-Power, Quad, 12-Bit Voltage-Output DAC
Serial-Interface Configurations
_______________________________________________________________________________________
Serial-Interface Description
Figure 2. Connections for Microwire
Figure 3. Connections for SPI/QSPI
Figure 4. Serial-Data Format
MSB ..................................................................................LSB
Address
A1
*THE DOUT-MISO CONNECTION IS NOT REQUIRED FOR WRITING TO THE MAX525,
*THE DOUT-SI CONNECTION IS NOT REQUIRED FOR WRITING TO THE MAX525,
BUT MAY BE USED FOR READBACK PURPOSES.
BUT MAY BE USED FOR READBACK PURPOSES.
Bits
Control Bits
4 Address/
with Serial Interface
A0
MAX525
MAX525
C1
Control
Bits
DOUT*
DOUT*
C0
SCLK
SCLK
DIN
DIN
16 Bits of Serial Data
CS
CS
MSB.............................................LSB
D11................................................D0
12 Data Bits
CPOL = 0, CPHA = 0
Data Bits
SK
SO
SI*
I/O
MISO*
MOSI
SCK
I/O
MICROWIRE
SPI/QSPI
PORT
PORT
+5V
SS
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