XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 106
XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
(362 pages)
- Current page: 106 of 362
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FLASH EEPROM
8.3 FLASH EEPROM Registers
8.3.1 FLASH EEPROM Lock Control Register
8.3.2 FLASH EEPROM Module Configuration Register
Data Sheet
106
A 4-byte register block controls the FLASH EEPROM module operation.
Configuration information is specified and programmed independently from the
contents of the FLASH EEPROM array. At reset, the 4-byte register section starts
at address $00F4.
In normal modes, the LOCK bit can be written only once after reset.
LOCK — Lock Register Bit
This register controls the operation of the FLASH EEPROM array. BOOTP cannot
be changed when the LOCK control bit in the FEELCK register is set or if ENPE in
the FEECTL register is set.
The boot block is located at $7800–$7FFF or $F800–$FFFF, depending upon the
mapped location of the FLASH EEPROM array and mask set ($7C00–$7FFF or
$FC00–$FFFF for 1-Kbyte block).
BOOTP — Boot Protect Bit
Figure 8-2. FLASH EEPROM Module Configuration Register (FEEMCR)
Address: $00F4
Address: $00F5
0 = Enable write to FEEMCR register.
1 = Disable write to FEEMCR register.
0 = Enable erase and program of 1-Kbyte or 2-Kbyte boot block.
1 = Disable erase and program of 1-Kbyte or 2-Kbyte boot block.
Reset:
Reset:
Read:
Write:
Read:
Write:
Figure 8-1. FLASH EEPROM Lock Control Register (FEELCK)
Bit 7
Bit 7
0
0
0
0
FLASH EEPROM
6
0
0
6
0
0
5
0
0
5
0
0
4
0
0
4
0
0
3
0
0
3
0
0
M68HC12B Family — Rev. 8.0
2
0
0
2
0
0
1
0
0
1
0
0
MOTOROLA
BOOTP
LOCK
Bit 0
Bit 0
0
1
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