XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 279

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XC912BC32CFU8

Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
16.10 Memory Map
16.11 Programmer’s Model of Message Storage
16.11.1 Message Buffer Organization
M68HC12B Family — Rev. 8.0
MOTOROLA
The msCAN12 occupies 128 bytes in the CPU12 memory space. The background
receive buffer can be read only in test mode.
This subsection details the organization of the receive and transmit message
buffers and the associated control registers.
Figure 16-10
programmer interface simplification, the receive and transmit message buffers
have the same register organization. Each message buffer allocates 16 bytes in
the memory map containing:
13-byte data structure which includes an identifier section (IDRn), a data
section (DSRn), and the data length register (DLR)
Transmit buffer priority register (TBPR) which is only applicable for transmit
buffers. See
Two unused bytes
shows the organization of a single message buffer. For reasons of
16.11.5 Transmit Buffer Priority Register
msCAN12 Controller
Figure 16-9. msCAN12 Memory Map
$010D
$013C
$013D
$010E
$010F
$011F
$013F
$014F
$015F
$016F
$017F
$0100
$0108
$0109
$0110
$0120
$0140
$0150
$0160
$0170
TRANSMIT BUFFER 0 (Tx0)
TRANSMIT BUFFER 1 (Tx1)
TRANSMIT BUFFER 2 (Tx2)
RECEIVE BUFFER (RxFG)
PORT CAN REGISTERS
CONTROL REGISTERS
ERROR COUNTERS
IDENTIFIER FILTER
RESERVED
RESERVED
16 BYTES
29 BYTES
9 BYTES
5 BYTES
2 BYTES
3 BYTES
msCAN12 Controller
Memory Map
Data Sheet
279

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