MT9122AE Zarlink Semiconductor, MT9122AE Datasheet - Page 12

• Manufacturer Part Number: MT9122AE
• Description: Description = Dual Voice Echo CANceller ( Itu-t G165 Compliant) With Disable Tone Detection ;; Package Type = Pdip ;; No. Of Pins = 28
• Manufacturer: Zarlink Semiconductor

MT9122
12
Normal Configuration Set pins CONFIG1 to 1 and CONFIG2 1 to select this
Back-to-Back
Configuration
Extended Delay
Configuration
Mute
Bypass
Disable Adaptation
Enable Adaptation
SSI
ST-BUS
12dB Attenuator
Double-Talk
Detector
Disable Tone
Detector
Disable Tone
Non-Linear
Processor
PCM Law
PCM Format
Narrow-Band Signal
Detector
Offset Null Filter
Function
configuration.
Set pins CONFIG1 to 1 and CONFIG2 to 0 to select
this configuration.
Set pins CONFIG1 to 0 and CONFIG2 to 1 to select
this configuration.
Set pins S2/S1 to 00 and S4/S3 to 00 to select for Echo
Canceller A and Echo Canceller B respectively.
Set pins S2/S1 to 01 and S4/S3 to 01 to select for Echo
Canceller A and Echo Canceller B, respectively.
Set pins S2/S1 to 10 and S4/S3 to 10 to select for Echo
Canceller A and Echo Canceller B, respectively.
Set pins S2/S1 to 11 and S4/S3 to 11 to select for Echo
Canceller A and Echo Canceller B, respectively.
Tie pin F0i to VSS to select.
Apply a valid ST-BUS frame pulse to F0i pin to select.
Always disabled.
Continuously enabled which disables filter adaptation
when double-talk is detected.
It is continuously enabled and puts TD1 or TD2 or both
into active low when disable tone is detected. The TD1
and TD2 outputs have to be externally manipulated by
the user to bypass the echo canceller.
Set pin REV to 1 to select disable tone with phase
reversal (G.165).
Set pin NLP to 1 to enable.
Set pin LAW to 1 or 0 to select A-Law or µ-Law
respectively.
Set pin FORMAT to 0 or 1 to select Sign-Magnitude or
ITU-T format respectively.
Continuously enabled which disables the filter adapta-
tion when narrow band signal is detected.
Continuously enabled which removes the DC compo-
nent in the PCM input.
selected when pins CONFIG1 & 2 ≠ 00
Table 7 - MT9122 Function Control Summary
Controllerless
Set bits Extended-Delay to 0 and BBM to 0 in Control Reg-
ister 1 to select.
Set bit BBM to 1 in Control Register 1 to select.
Set bit Extended-Delay to 1 in Control Register 1 to select.
Set bit MuteR to 1 or MuteS to 1 in Control Register 2 to
select.
Set bit Bypass to 1 in Control Register 1 to select.
Set bit AdaptDis to 1 in Control Register 1 to select.
Set bits AdaptDis to 0 and Bypass to 0 in Control Register
1 to select.
Tie pin F0i to VSS to select.
Apply a valid ST-BUS frame pulse to F0i pin to select.
Set bit PAD to 1 in Control Register 1 to enable.
The detection threshold can be controlled via Double-Talk
Detection Threshold Register 1 and 2.
Set bit TDis to 1 in Control Register 2 to disable tone
detectors.
Set bit PHDis to 1 in Control Register 2 to select disable
tone without phase reversal (G164).
Set bit NLPDis to 1 to disable.
Set pin LAW to 1or 0 to select A-Law or µ-Law
respectively.
Set pin FORMAT to 0 or 1 to select Sign-Magnitude or
ITU-T format respectively.
Set bit NBDis to 1 in Control Register 2 to disable.
Set bit HPFDis to 1 in Control Register 2 to disable.
selected when pins CONFIG1 & 2 = 00
Controller
Data Sheet