MT9126AS Zarlink Semiconductor, MT9126AS Datasheet - Page 9

• Manufacturer Part Number: MT9126AS
• Description: Description = Quad Adpcm (G.726) Transcoder ;; Package Type = Pdip ;; No. Of Pins = 28
• Manufacturer: Zarlink Semiconductor

Data Sheet
X = undetermined logic level output; don’t care input
Outputs high impedance outside of channel strobe boundaries
Two frame delay from data input to data output
X = undetermined logic level output; don’t care input
Outputs high impedance outside of channel strobe boundaries
Two frame delay from data input to data output
BCLK
ENB1
ENB2/F0od
PCMi/o1
PCMi/o2
ADPCM i/o
ADPCM i/o
BCLK
EN1
ENB1
ENB2/F0od
PCMi/o1
PCMi/o2
ADPCM i/o
ADPCMi/o
32 kb/s
24 kb/s
16 kb/s
Figure 4 - SSI 8-Bit Companded PCM Relative Timing
12
Figure 5 - SSI 16-Bit Linear PCM Relative Timing
1234 1234 1234 1234
123x 123x 123x 123x
B
32 kb/s
24 kb/s
16 kb/s
1
SSS 12 11 10 9 8 7 6 5 4 3 2 1 0
B1
SEL = 0
12 12 12
B
2
...
B
3
B2
B1
B
(2.048 MHz only)
4
12
B
1
SEL = 1
B3
12 12 12
B
2
B
3
B4
B
4
SSS 12 11 10 9 8 7 6 5 4 3 2 1 0
1 2
7 6 5
7 6 5
1 2 3 4
1 2 3 x
B1
B1
1 2 1 2
SEL = 0
B2
B2
4
4
B1
B3
1 2 3 4
3
3
1 2 3 x
B3
2 1 0
2 1 0 7 6 5
Notes:
B2
1 2 1 2 1 2 1 2 1 2
B4
S = 3 bits sign extension
A-Law is 12 bit 2’s complement data (shifted left once and utilizing
bits 1 - 12, bit 0 not defined)
Law is 13 bit 2’s complement data (bits 0 -12)
SSS 12 11 10 9 8 7 6 5 4 3 2 1 0
7 6 5
1 2 3 4
1 2 3 x
B1
B3
SEL = 1
B2
B3
B2
B4
4
4
12
1234 1234
123x 123x
B
1
B3
SEL = 1
1 2 3 4
1 2 3 x
3
3
B3
12 12 12
B
2
B4
2 1 0
2 1 0
B
3
B4
B4
B
4
SSS 12 11 10 9 8 7 6 5 4 3 2 1 0
SEL for 16 kb/s only
SEL for 16 kb/s only
B4
MT9126
8-97