MT92210 Zarlink Semiconductor, MT92210 Datasheet - Page 18

no-image

MT92210

Manufacturer Part Number
MT92210
Description
1023 Channel Voice Over ip (VoIP) Processor
Manufacturer
Zarlink Semiconductor
Datasheet
18
2.2.1.2 Interrupt Servicing
When interrupt2 is asserted (‘inetrrupt2’ pin):
1. Read the interrupt flags to ascertain the module raising the interrupt. The CPU module interrupt flag is located
2. If the cpureg_interrupt_active bit is set, check the source of the CPU interrupt by reading the ‘status0’ register
3. To de-assert the interrupt the user must write 1 to corresponding bit in register 102h, ether
in register inetrrupt_flags(210h), this bit is named cpureg_interrupt_active.
at 102h, either internal_read_timeout_sar, and/or inmo_read_done, and/or interrnal_read_timeout_net
internal_read_timeout_sar, and/or inmo_read_done, and/or internal_read_timeout_net. Only then will the inter-
rupt be de-asserted.
b 15
b14
Interrupt1 Enable (0218h)
b13
interrupt1_active_level
b12
b11
b10
Global Service Register (0210h)
Interrupt Enable Bits
b9
AND
Status Bits
Figure 2 - Internal Interrupt Network
b8
Frequency
Controler
Interrupt
b7
AND
OR
Zarlink Semiconductor Inc.
b6
OR
interrupt1
b5
interrupt2_active_level
b4
b3
b2
internal interrupt
b1
b0
AND
OR
interrupt2
Interrupt2 Enable (021Ch)

Related parts for MT92210